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RA4L1 Scheda tecnica(PDF) 87 Page - Renesas Technology Corp |
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RA4L1 Scheda tecnica(HTML) 87 Page - Renesas Technology Corp |
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87 / 125 page  Table 2.52 A/D conversion characteristics (1) in high-speed A/D conversion mode (2 of 2) Conditions: VCC = AVCC0 = VREFH0 = 2.7 to 3.6 V*5, VSS = AVSS0 = VREFL0 = 0 V Reference voltage range applied to the VREFH0 and VREFL0. Parameter Min Typ Max Unit Test conditions Analog input voltage range Ain 0 — VREFH0 V — Resolution — — 12 Bit — Conversion time*1 (Operation at PCLKC = 48 MHz) Permissible signal source impedance Max. = 0.3 kΩ 0.67 (0.219)*4 — — µs High-precision channel ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0x0A ADACSR.ADSAC = 1 1.29 (0.844)*4 — — µs Normal-precision channel ADCSR.ADHSC = 0 ADSSTRn.SST[7:0] = 0x28 ADACSR.ADSAC = 1 Offset error — ±1.0 ±5.5 LSB High-precision channel ±7.0 LSB Other than specified Full-scale error — ±1.0 ±5.5 LSB High-precision channel ±7.0 LSB Other than specified Quantization error — ±0.5 — LSB — Absolute accuracy — ±2.5 ±6.0 LSB High-precision channel ±9.0 LSB Other than specified DNL differential nonlinearity error — ±1.0 — LSB — INL integral nonlinearity error — ±1.5 ±3.0 LSB — Note: The characteristics apply when no pin functions other than 12-bit A/D converter input are used. Absolute accuracy does not include quantization errors. Offset error, full-scale error, DNL differential nonlinearity error, and INL integral nonlinearity error do not include quantization errors. Note 1. The conversion time is the sum of the sampling time and the comparison time. The number of sampling states is indicated for the test conditions. Note 2. Except for I/O input capacitance (Cin), see section 2.2.4. I/O VOH, VOL, and Other Characteristics. Note 3. Reference data. Note 4. ( ) lists sampling time. Note 5. When VREFH0 < AVCC0, the MAX. values are as follows. Absolute accuracy/Offset error/Full-scale error: For voltage difference between AVCC0 and VREFH0, it should be added ±0.75 LSB/V to the Max spec. INL integral non-linearity error: For voltage difference between AVCC0 and VREFH0, it should be added ±0.2 LSB/V to the Max spec. Table 2.53 A/D conversion characteristics (2) in high-speed A/D conversion mode (1 of 2) Conditions: VCC = AVCC0 = VREFH0 = 2.4 to 3.6 V*5, VSS = AVSS0 = VREFL0 = 0 V Reference voltage range applied to the VREFH0 and VREFL0. Parameter Min Max Unit Test conditions PCLKC (ADCLK) frequency 1 — 32 MHz — Analog input capacitance*2 Cs — — 9*3 pF High-precision channel — — 10*3 pF Normal-precision channel Analog input resistance Rs — — 2.2*3 kΩ High-precision channel — — 7.0*3 kΩ Normal-precision channel Analog input voltage range Ain 0 — VREFH0 V — Resolution — — 12 Bit — RA4L1 Datasheet 2. Electrical Characteristics R01DS0447EJ0131 Rev.1.31 May 26, 2026 Page 87 of 125 |
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