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AS3701 Scheda tecnica(PDF) 56 Page - ams-OSRAM AG

Il numero della parte AS3701
Spiegazioni elettronici  Micro-PMIC
PDF  110 Pages
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Produttore elettronici  AMSOSRAM [ams-OSRAM AG]
Homepage  https://ams-osram.com/
Logo AMSOSRAM - ams-OSRAM AG

AS3701 Scheda tecnica(HTML) 56 Page - ams-OSRAM AG

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ams Datasheet
Page 55
[v1-11] 2016-Dec-14
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AS3701 − Detailed Description – System Functions
The transmission begins with the START condition, which is
generated by the master when the bus is in IDLE state (the bus
is free). The device-write address is followed by the word
address. After the word address any number of data bytes can
be sent to the slave. The word address is incremented internally,
in order to write subsequent data bytes on subsequent address
locations.
For reading data from the slave device, the master has to change
the transfer direction. This can be done either with a repeated
START condition followed by the device-read address, or simply
with a new transmission START followed by the device-read
address, when the bus is in IDLE state. The device-read address
is always followed by the 1st register byte transmitted from the
slave. In Read Mode any number of subsequent register bytes
can be read from the slave. The word address is incremented
internally.
I²C Read Access
Random, Sequential and Current Address Read are used to read
data from the slave.
Figure 62:
I²C Random Read
Random Read and Sequential Read are combined formats. The
repeated START condition is used to change the direction after
the data transfer from the master.
The word address transfer is initiated with a START condition
issued by the master while the bus is idle. The START condition
is followed by the device-write address and the word address.
In order to change the data direction a repeated START
condition is issued on the 1st SCL pulse after the acknowledge
bit of the word address transfer. After the reception of the
device-read address, the slave becomes the transmitter. In this
state the slave transmits register data located by the previous
received word address vector. The master responds to the data
byte with a not-acknowledge, and issues a STOP condition on
the bus.
WA
DR
data
AA Sr
A
N P
SDW
read register
WA++



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