RZSLASHT2ME datasheet(14/116 Pages) RENESAS

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1.5

Pin Functions

Table 1.17 lists the pin functions.

Table 1.17

Pin functions (1 of 6)

Classification

Pin name

I/O

Description

Power supply

VDD

Input

Power supply pin. Connect this pin to the system

power supply.

VSS

Input

Ground pin. Connect this pin to the system power

supply (0 V).

VCC1833_0

VCC1833_1

VCC1833_2

VCC1833_3

VCC1833_4

Input

Power supply pin for each I/O domains. (1.8 V or 3.3 V)

This pin is available for BGA package product only.

VCC33

Input

Power supply pin for I/O pins.

VCC18_PLL0, VCC18_PLL1

Input

Power supply pins for the on-chip PLL oscillator

AVCC18_TSU

Input

Power supply pin for the temperature sensor unit

Clock

XTAL

Output

Connected to a crystal resonator. When external clock

signal is used, EXTAL pin should be driven low. XTAL

pin should never be driven or loaded by anything other

than crystal oscillator. The voltage level of EXTAL must

not exceed core VDD (1.16 V).

EXTAL

Input

EXTCLKIN

Input

Inputs the external clock. When a crystal resonator is

connected, it should be driven low.

CKIO

Output

Outputs the external bus clock for external devices.

ETH0_REFCLK

Output

Outputs 25 MHz clock for EtherPHY 0

ETH1_REFCLK

Output

Outputs 25 MHz clock for EtherPHY 1

ETH2_REFCLK

Output

Outputs 25 MHz clock for EtherPHY 2

RMII0_REFCLK

Output

Outputs 50 MHz clock for RMII0

RMII1_REFCLK

Output

Outputs 50 MHz clock for RMII1

RMII2_REFCLK

Output

Outputs 50 MHz clock for RMII2

Operating mode control

MDX

Input

This signal should be driven low.

MD0 to MD2

Input

Input the operating mode select signal. The signal level

on these pins must not be changed during operation

mode transition on release from the reset state.

MDV0 to MDV4

Input

Input the operating voltage select signal. The signal

level on these pins must not be changed during

operation mode transition on release from the reset

state.

MDW

Input

Input the ATCM wait cycle select signal. The signal

level on this pin must not be changed during operation

mode transition on release from the reset state.

MDD

Input

Input the enabling JTAG authentication by hash signal.

The signal level on this pin must not be changed during

operation mode transition on release from the reset

state.

System control

RES#

Input

Inputs the reset signal. This MPU enters the reset state

when this signal goes low.

BSCANP

Input

Inputs the boundary scan enable signal. Boundary

scan is enabled when this pin goes high. When

boundary scan is not used, this pin should be driven

low.

RSTOUT#

Output

Outputs the reset signal externally

RZ/T2ME Datasheet

1. Overview

R01DS0441EJ0110 Rev.1.10

Mar 13, 2026

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