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ADMV4530 Scheda tecnica(PDF) 1 Page - Analog Devices |
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ADMV4530 Scheda tecnica(HTML) 1 Page - Analog Devices |
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1 / 64 page  Data Sheet ADMV4530 Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO Rev. C DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► RF output frequency range: 27 GHz to 31 GHz ► Two upconversion modes ► Direct upconversion from differential baseband I/Q (I/Q mode) ► Single upper sideband upconversion (IF mode) ► 1 dB bandwidth: 500 MHz (I/Q mode) ► Input frequency range: 2 GHz to 3 GHz (IF mode) ► Matched, 50 Ω, single-ended RF output ► Matched, 50 Ω, single-ended IF input ► Programmable baseband I/Q common mode-voltage ► Sideband rejection and carrier feedthrough optimization ► Combined RF and IF gain dynamic range: 70 dB ► Programmable automatic IF gain control ► Programmable via 3-wire or 4-wire SPI ► 40-terminal, 6 mm × 6 mm, RoHS compliant LGA APPLICATIONS ► Satellite communication ► Point to point microwave communication GENERAL DESCRIPTION The ADMV4530 is a highly integrated upconverter with an in- phase/quadrature (I/Q) mixer that is ideally suited for next genera- tion Ka band satellite communications. An integrated low phase noise, fractional-N phase-locked loop (PLL) with a voltage controlled oscillator (VCO) and internal 2× mul- tiplier generate the necessary on-chip local oscillator (LO) signal for the I/Q mixer, eliminating the need for external frequency synthesis. The VCO uses an internal autocalibration routine that allows the PLL to select the necessary settings and locks in approximately 100 µs. The single-ended reference input to the PLL operates up to 500 MHz and features internal reference dividers and a multipli- er for added flexibility. Additionally, the phase frequency detector (PFD) comparison frequency can be up to 250 MHz for integer mode and 160 MHz for fraction-N mode. The upconverter consists of an I/Q mixer that can operate in either I/Q mode with 500 MHz of bandwidth or in IF mode up to 3 GHz of bandwidth, which allows various radio architectures and backward compatibility with legacy systems. Immediately following the I/Q mixer are stages of gain and variable attenuation. The configuration can achieve a minimum 1 dB com- pression point (P1dB) compression point of 19 dBm, eliminating the need for external stages of gain. A programmable 4-wire serial port interface (SPI) allows adjustment of the quadrature phase for optimum sideband suppression. In addition, the SPI allows nulling of LO feedthrough in IF mode. In I/Q mode, the LO feedthrough can be nulled by applying external dc offset to the differential baseband I/Q inputs. An IF automatic gain control (AGC) adjusts the IF variable gain amplifier (VGA) to compensate for input power variations. During normal operation, this AGC feature can be enabled or disabled via the SPI. When disabled during normal operation, the AGC feature only works on a test tone during power-down mode to track temperature variations. The ADMV4530 upconverter comes in a RoHS compliant, 6 mm × 6 mm, 40-terminal land grid array (LGA) package. The ADMV4530 operates over the −40°C to +85°C case temperature range. |
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