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R5F64110DFB Scheda tecnica(PDF) 18 Page - Renesas Technology Corp

Il numero della parte R5F64110DFB
Spiegazioni elettronici  RENESAS MCU
PDF  84 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F64110DFB Scheda tecnica(HTML) 18 Page - Renesas Technology Corp

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R01DS0062EJ0130 Rev.1.30
Page 18 of 93
Mar 3, 2014
R32C/111 Group
1. Overview
1.5
Pin Definitions and Functions
Tables 1.11 to 1.17 show the pin definitions and functions.
Table 1.11
Pin Definitions and Functions for the 100-pin Package (1/4)
Function
Symbol
I/O
Power
Supply
Description
Power supply
VCC1, VCC2,
VSS
I—
Applicable as follows: VCC1 and VCC2 = 3.0 to
5.5 V (VCC1
 VCC2), VSS = 0 V
Connecting pins
for decoupling
capacitor
VDC0, VDC1
——
A decoupling capacitor for internal voltage should
be connected between VDC0 and VDC1
Analog power
supply
AVCC, AVSS
I
VCC1
Power supply for the A/D converter. AVCC and
AVSS should be connected to VCC1 and VSS,
respectively
Reset input
RESET
I
VCC1
The MCU is reset when this pin is driven low
CNVSS
CNVSS
I
VCC1
This pin should be connected to VSS via a resistor
Debug port
NSD
I/O
VCC1
This pin is to communicate with a debugger. It
should be connected to VCC1 via a resistor of 1 to
4.7 k
Main clock input
XIN
I
VCC1
Input/output for the main clock oscillator. A crystal,
or a ceramic resonator should be connected
between pins XIN and XOUT. An external clock
should be input at the XIN while leaving the XOUT
open
Main clock output XOUT
O
VCC1
Sub clock input
XCIN
I
VCC1
Input/output for the sub clock oscillator. A crystal
oscillator should be connected between pins XCIN
and XCOUT. An external clock should be input at
the XCIN while leaving the XCOUT open
Sub clock output XCOUT
O
VCC1
BCLK output
BCLK
O
VCC2
BCLK output
Clock output
CLKOUT
O
VCC2
Output of the clock with the same frequency as
low speed clocks, f8, or f32
External interrupt
input
INT0 to INT5
I
VCC1
VCC2
Input for external interrupts
NMI input
P8_5/
NMI
I
VCC1
Input for NMI
Key input interrupt
KI0 to KI3
I
VCC1
Input for the key input interrupt
Bus control pins
D0 to D7
I/O
VCC2
Input/output of data (D0 to D7) while accessing an
external memory space with a separate bus
D8 to D15
I/O
VCC2
Input/output of data (D8 to D15) while accessing
an external memory space with 16-bit separate
bus
A0 to A23
O
VCC2
Output of address bits A0 to A23



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