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HS4318ESS01H Scheda tecnica(PDF) 51 Page - Renesas Technology Corp |
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HS4318ESS01H Scheda tecnica(HTML) 51 Page - Renesas Technology Corp |
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51 / 68 page ![]() HD404318 Series 49 A/D Converter The MCU also contains a built-in A/D converter that uses a sequential comparison method with a resistance ladder. It can perform digital conversion of eight analog inputs with 8-bit resolution. The following describes the A/D converter. • A/D mode register 1 (AMR1: $019) is used to select digital or analog ports • A/D mode register 2 (AMR2: $01A) is used to set the A/D conversion speed and to select digital or analog ports • The A/D channel register (ACR: $016) is used to select an analog input channel • A/D conversion is started by setting the A/D start flag (ADSF: $020, 2) to 1. After the conversion is completed, converted data is stored in the A/D data register, and at the same time, the A/D start flag is cleared to 0 • By setting the I AD off flag (IAOF: $021, 2) to 1, the current flowing through the resistance ladder can be cut off even while operating in standby or active mode IAD off flag (IAOF) 3 A/D channel register (ACR) A/D mode register 2 (AMR2) A/D mode register 1 (AMR1) A/D interrupt request flag (IFAD) Encoder A/D data register (ADRU, L) A/D start flag (ADSF) D/A AVCC AVSS Operating mode signal (1 in stop mode) + – Comp A/D controller AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 Control signal for conversion time 4 Figure 40 A/D Converter Block Diagram |
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