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HS4318ESS01H Scheda tecnica(PDF) 27 Page - Renesas Technology Corp |
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HS4318ESS01H Scheda tecnica(HTML) 27 Page - Renesas Technology Corp |
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27 / 68 page ![]() HD404318 Series 25 Table 6 Circuit Configurations of Standard I/O Pins I/O Pin Type Circuit Pins Input/output pins VCC VCC Pull-up control signal Buffer control signal Output data Input data HLT MIS3 PDR Input control signal DCR R0 0, R0 1, R0 3 R3 0–R3 3, R4 0–R4 3 VCC VCC Pull-up control signal Buffer control signal Output data Input data HLT MIS3 DCR PDR Input control signal MIS2 R0 2 Peripheral function pins Input/ output pins VCC VCC Pull-up control signal Output data Input data HLT MIS3 SCK SCK SCK Output pins VCC VCC Pull-up control signal PMOS control signal Output data HLT MIS3 SO MIS2 SO VCC VCC Pull-up control signal Output data HLT MIS3 TOC TOC Notes on next page. |
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