7641 datasheet(32/138 Pages) RENESAS

32 / 138 page

7641 Group

Rev.4.00

Aug 28, 2006

page 32 of 135

REJ03B0191-0400

UART1, UART2

The UART consists of two channels: UART1 and UART2. Each

has a dedicated timer provided to generate transfer clocks and op-

erates independently. Both UART1 and UART2 have the same

functions.

Twelve serial data transfer formats can be selected, and the trans-

fer formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer, but the

two buffers have the same address in a memory. Since the shift

written to the transmit buffer register, and receive data is read

from the receive buffer register.

The transmit buffer register can also hold the next data to be

transmitted, and the receive buffer register can hold a character

while the next character is being received.

The transfer speed (baud rate) is expression as follows:

Transfer speed (baud rate) = fi / {(n + 1) ✕ 16 }

n: The contents of UARTx (x = 1, 2) baud rate generator

fi: Using UART clock prescaling select bits, select any one of

φ, φ/

φ/32, φ/256, SCSGCLK, SCSGCLK/8, SCSGCLK/32 and

SCSGCLK/256

OER

PER

FER

003416

003C16

Receive buffer register 1

Receive buffer register 2

Receive shift register 1

Receive shift register 2

Address 003016

Address 003816

UARTx mode register

UARTx control register

Address 003316

Address003B16

Receive buffer full flag (RBF)

Receive buffer full interrupt request (UxRBF)

Receive summing error interrupt request (UxES)

SPdetector

UART character length select bits

7 bits

8 bits

9 bits

detector

P85/URXD1

P81/URXD2/SCLK

P84/UTXD1

P80/UTXD2/SRDY

SCSGCLK

Prescaler

1/1

1/8

1/32

1/256

Baud rate generator

ST/SP/PA generator

Clock control circuit

1/16

Addresses 003516

Addresses 003D16

P86/CTS1

P82/CTS2/SRXD

RTS control register

P87/RTS1

P83/RTS2/STXD

Frequency

division ratio

1/(n+1)

Addresses 003616

Addresses 003E16

Addresses 003116

Addresses 003916

Character length select bit

Transmit shift register 1

Transmit shift register 2

Transmit buffer register 1

Transmit buffer register 2

Transmit comple flag

(TCM)

Transmit interrupt source select bit

Transmit interrupt

request (UxTX)

Transmit buffer empty

flag (TBE)

UART status register

Data bus

UART clock

prescaling select bits

UART clock

select bit

003416

003C16

Addresses 003516

Addresses 003D16

Address 003216

Address 003A16

Fig. 26 UARTx (x = 1, 2) block diagram

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