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M38063M2AFP Scheda tecnica(PDF) 10 Page - Renesas Technology Corp |
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M38063M2AFP Scheda tecnica(HTML) 10 Page - Renesas Technology Corp |
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10 / 58 page ![]() 9 MITSUBISHI MICROCOMPUTERS 3806 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The 3806 group uses the standard 740 family instruction set. Re- fer to the table of 740 family addressing modes and machine in- structions or the SERIES 740 <Software> User’s Manual for de- tails on the instruction set. Machine-resident 740 family instructions are as follows: The FST and SLW instruction cannot be used. The STP, WIT, MUL, and DIV instruction can be used. CPU mode register The CPU mode register is allocated at address 003B16. The CPU mode register contains the stack page selection bit. Fig. 1 Structure of CPU mode register CPU mode register (CPUM : address 003B16) b7 b0 Stack page selection bit 0 : 0 page 1 : 1 page Not used (return “0” when read) Processor mode bits b1 b0 0 0 : Single-chip mode 0 1 : Memory expansion mode 1 0 : Microprocessor mode 1 1 : Not available |
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