H8SX1663 datasheet(378/1158 Pages) RENESAS

378 / 1158 page

Section 7 DMA Controller (DMAC)

Rev.1.00 Jun. 07, 2006 Page 326 of 1102

REJ09B0294-0100

7.3.5

DMA Block Size Register (DBSR)

DBSR specifies the repeat size or block size. DBSR is enabled in repeat transfer mode and block

transfer mode and is disabled in normal transfer mode.

BKSZH31

R/W

BKSZH30

R/W

BKSZH29

R/W

BKSZH28

R/W

BKSZH27

R/W

BKSZH24

R/W

BKSZH26

R/W

BKSZH25

R/W

Bit

Bit Name

Initial Value

R/W

BKSZH23

R/W

BKSZH22

R/W

BKSZH21

R/W

BKSZH20

R/W

BKSZH19

R/W

BKSZH16

R/W

BKSZH18

R/W

BKSZH17

R/W

Bit

Bit Name

Initial Value

R/W

BKSZ15

R/W

BKSZ14

R/W

BKSZ13

R/W

BKSZ12

R/W

BKSZ11

R/W

BKSZ8

R/W

BKSZ10

R/W

BKSZ9

R/W

Bit

Bit Name

Initial Value

R/W

BKSZ7

R/W

BKSZ6

R/W

BKSZ5

R/W

BKSZ4

R/W

BKSZ3

R/W

BKSZ0

R/W

BKSZ2

R/W

BKSZ1

R/W

Bit

Bit Name

Initial Value

R/W

Bit

Bit Name

Initial

Value

R/W

Description

31 to 16 BKSZH31 to

BKSZH16

Undefined

R/W

Specify the repeat size or block size.

When H'0001 is set, the repeat or block size is one byte,

one word, or one longword. When H'0000 is set, it

means the maximum value (refer to table 7.1). While the

DMA is in operation, the setting is fixed.

15 to 0

BKSZ15 to

BKSZ0

Undefined

R/W

Indicate the remaining repeat or block size while the

DMA is in operation. The value is decremented by 1

every time data is transferred. When the remaining size

becomes 0, the value of the BKSZH bits is loaded. Set

the same value as the BKSZH bits.

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