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H8SX1663 Scheda tecnica(PDF) 88 Page - Renesas Technology Corp |
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H8SX1663 Scheda tecnica(HTML) 88 Page - Renesas Technology Corp |
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88 / 1158 page ![]() Section 2 CPU Rev.1.00 Jun. 07, 2006 Page 36 of 1102 REJ09B0294-0100 2.6 Data Formats The H8SX CPU can process 1-bit, 4-bit BCD, 8-bit (byte), 16-bit (word), and 32-bit (longword) data. Bit-manipulation instructions operate on 1-bit data by accessing bit n (n = 0, 1, 2, …, 7) of byte operand data. The DAA and DAS decimal-adjust instructions treat byte data as two digits of 4-bit BCD data. 2.6.1 General Register Data Formats Figure 2.12 shows the data formats in general registers. 7 6 5 4 3 2 1 0 Don't care 7 0 Don't care 7 6 5 4 3 2 1 0 43 70 70 Don’t care Upper Lower LSB MSB LSB 1-bit data 1-bit data 4-bit BCD data 4-bit BCD data Byte data Byte data Word data Word data Longword data RnH RnL RnH RnL RnH RnL Rn En ERn MSB Don't care Upper Lower 43 7 0 Don't care 7 0 Don't care 70 General register ER General register E General register R General register RH [Legend] ERn: En: Rn: RnH: 0 15 MSB LSB 0 LSB 15 16 MSB 31 En Rn 0 MSB LSB 15 RnL: MSB: LSB: General register RL Most significant bit Least significant bit Figure 2.12 General Register Data Formats |
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