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H8SX1663 Scheda tecnica(PDF) 513 Page - Renesas Technology Corp |
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H8SX1663 Scheda tecnica(HTML) 513 Page - Renesas Technology Corp |
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513 / 1158 page ![]() Section 9 I/O Ports Rev.1.00 Jun. 07, 2006 Page 461 of 1102 REJ09B0294-0100 (7) PA1/ BACK/(RD/WR) The pin function is switched as shown below according to the combination of operating mode, EXPE bit, bus controller register, port function control register (PFCR), and the PA1DDR bit settings. Setting Bus Controller I/O Port Module Name Pin Function BACK_OE Byte control SRAM Selection (RD/ WR)_OE PA1DDR BACK output * 1 0 1 Bus controller RD/ WR output * 0 0 1 PA1 output 0 0 0 1 I/O port PA1 input (initial setting) 0 0 0 0 Note: * Valid in external extended mode (EXPE = 1) (8) PA0/ BREQO/BS-A The pin function is switched as shown below according to the combination of operating mode, EXPE bit, bus controller register, port function control register (PFCR), and the PA0DDR bit settings. Setting I/O Port Bus Controller I/O Port Module Name Pin Function BSA_OE BREQO_OE PA0DDR BS-A output* 1 Bus controller BREQO output* 0 1 PA0 output 0 0 1 I/O port PA0 input (initial setting) 0 0 0 Note: * Valid in external extended mode (EXPE = 1) |
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