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H8SX1663 Scheda tecnica(PDF) 951 Page - Renesas Technology Corp

Il numero della parte H8SX1663
Spiegazioni elettronici  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Section 21 Flash Memory (0.18-
µm F-ZTAT Version)
Rev.1.00 Jun. 07, 2006 Page 899 of 1102
REJ09B0294-0100
(4) Flash Multipurpose Address Area Parameter (FMPAR: General Register ER1 of CPU)
FMPAR stores the start address of the programming destination on the user MAT.
When an address in an area other than the flash memory is set, or the start address of the
programming destination is not aligned with the 128-byte boundary, an error occurs. The error
occurrence is indicated by the WA bit in FPFR.
31
MOA31
30
MOA30
29
MOA29
28
MOA28
27
MOA27
24
MOA24
26
MOA26
25
MOA25
23
MOA23
22
MOA22
21
MOA21
20
MOA20
19
MOA19
16
MOA16
18
MOA18
17
MOA17
15
MOA15
14
MOA14
13
MOA13
12
MOA12
11
MOA11
8
MOA8
10
MOA10
9
MOA9
7
MOA7
6
MOA6
5
MOA5
4
MOA4
3
MOA3
0
MOA0
2
MOA2
1
MOA1
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Initial
Value
R/W
Description
31 to 0
MOA31 to
MOA0
R/W
These bits store the start address of the programming
destination on the user MAT. Consecutive 128-byte
programming is executed starting from the specified
start address of the user MAT. Therefore, the specified
start address of the programming destination becomes a
128-byte boundary, and MOA6 to MOA0 are always
cleared to 0.



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