SH7052 datasheet(186/919 Pages) RENESAS

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SAR3

DAR3

Data

buffer

Memory

Transfer source

module

Transfer destination

module

Temporary

buffer

The SAR3 value is taken as the address, memory data is read, and the value is stored in the

temporary buffer. Since the value read at this time is used as the address, it must be 32 bits.

If the data bus is 16 bits wide when the external memory space is accessed, two bus cycles

are necessary.

1st and 2nd bus

cycles

3rd bus cycle

4th bus cycle

DMAC

SAR3

DAR3

Data

buffer

Memory

Transfer source

module

Transfer destination

module

Temporary

buffer

The value in the temporary buffer is taken as the address, and data is read from the

transfer source module to the data buffer.

SAR3

DAR3

Data

buffer

Memory

Transfer source

module

Transfer destination

module

Temporary

buffer

The DAR3 value is taken as the address, and the value in the data buffer is written to the

transfer destination module.

Note:

Memory, transfer source, and transfer destination modules are shown here.

In practice, connection can be made as long as it is within the address space.

DMAC

Figure 9.5 Dual Address Mode and Indirect Address Operation (16-Bit-Width External

Memory Space)

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