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LTC3405 Scheda tecnica(PDF) 11 Page - Linear Technology |
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LTC3405 Scheda tecnica(HTML) 11 Page - Linear Technology |
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11 / 16 page ![]() 11 LTC3405 3405fa ambient temperature of 70°C. From the typical perfor- mance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.94Ω. There- fore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 84.6mW For the SOT-23 package, the θJA is 250°C/ W. Thus, the junction temperature of the regulator is: TJ = 70°C + (0.0846)(250) = 91.15°C which is well below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction tempera- ture is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (∆ILOAD • ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady- state value. During this recovery time VOUT can be moni- tored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA. APPLICATIO S I FOR ATIO top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3405 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3405 is running at high ambient tempera- ture with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maxi- mum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3405 from exceeding the maximum junction temperature, the user will need to do a thermal analysis. The goal of the thermal analysis is to determine whether the operating conditions exceed the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3405 in dropout at an input voltage of 2.7V, a load current of 300mA and an |
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