LTC3405 datasheet(6/16 Pages) LINER

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LTC3405

3405fa

FU CTIO AL DIAGRA

–

OVDET

IRCMP

–

ICOMP

RUN

OSC

SLOPE

COMP

OSC

FREQ

SHIFT

0.8V

0.85V

0.8V REF

SHUTDOWN

0.4V

0.65V

SLEEP

VIN

VFB

MODE

BURST

VIN

RS LATCH

SWITCHING

LOGIC

AND

BLANKING

CIRCUIT

ANTI-

SHOOT-

THRU

5Ω

GND

3405 BD

OPERATIO (Refer to Functional Diagram)

Main Control Loop

The LTC3405 uses a constant frequency, current mode

step-down architecture. Both the main (P-channel

MOSFET) and synchronous (N-channel MOSFET) switches

are internal. During normal operation, the internal top

power MOSFET is turned on each cycle when the oscillator

sets the RS latch, and turned off when the current com-

parator, ICOMP, resets the RS latch. The peak inductor

current at which ICOMP resets the RS latch, is controlled by

the output of error amplifier EA. The VFB pin, described in

the Pin Functions section, allows EA to receive an output

feedback voltage from an external resistive divider. When

the load current increases, it causes a slight decrease in

the feedback voltage relative to the 0.8V reference, which

in turn, causes the EA amplifier’s output voltage to in-

crease until the average inductor current matches the new

load current. While the top MOSFET is off, the bottom

MOSFET is turned on until either the inductor current

starts to reverse, as indicated by the current reversal

comparator IRCMP, or the beginning of the next clock

cycle.

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