LTC3707IGN datasheet(8/32 Pages) LINER

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LTC3707

3707fb

PIN FUNCTIONS

RUN/SS1,RUN/SS2(Pins1,15):Combinationofsoft-start,

run control inputs and short-circuit detection timers. A

capacitor to ground at each of these pins sets the ramp

time to full output current. Forcing either of these pins

back below 1.0V causes the IC to shut down the circuitry

required for that particular controller. Latchoff overcurrent

protection is also invoked via this pin as described in the

Applications Information section.

SENSE1+, SENSE2+ (Pins 2, 14):

The (+) Input to the

Differential Current Comparators. The ITH pin voltage and

controlled offsets between the SENSE– and SENSE+ pins in

conjunction with RSENSE set the current trip threshold.

SENSE1–, SENSE2– (Pins 3, 13):

The (–) Input to the

Differential Current Comparators.

VOSENSE1, VOSENSE2 (Pins 4, 12): Receives the remotely-

sensed feedback voltage for each controller from an external

resistive divider across the output.

FREQSET (Pin 5): Frequency Control Input to the Oscillator.

This pin can be left open, tied to ground, tied to INTVCC

or driven by an external voltage source. This pin can also

be used with an external phase detector to build a true

phase-locked loop.

STBYMD (Pin 6): Control pin that determines which cir-

cuitry remains active when the controllers are shut down

and/or provides a common control point to shut down both

controllers. See the Operation section for details.

FCB (Pin 7): Forced Continuous Control Input. This input

acts on both controllers and is normally used to regulate a

secondary winding. Pulling this pin below 0.8V will force

continuous synchronous operation on both controllers.

Do not leave this pin ﬂoating.

ITH1,ITH2(Pins8,11):ErrorAmpliﬁerOutputandSwitching

Regulator Compensation Point. Each associated channels’

current comparator trip point increases with this control

voltage.

SGND (Pin 9): Small Signal Ground common to both

controllers, must be routed separately from high current

grounds to the common (–) terminals of the COUT

capacitors.

3.3VOUT (Pin 10): Output of a linear regulator capable

of supplying 10mA DC with peak currents as high as

50mA.

PGND (Pin 20): Driver Power Ground. Connects to the

sources of bottom (synchronous) N-channel MOSFETs,

anodes of the Schottky rectiﬁers and the (–) terminal(s)

of CIN.

INTVCC (Pin 21): Output of the Internal 5V Linear Low

Dropout Regulator and the EXTVCC Switch. The driver and

control circuits are powered from this voltage source. Must

be decoupled to power ground with a minimum of 4.7μF

tantalum or other low ESR capacitor. The INTVCC regulator

standby function is determined by the STBYMD pin.

EXTVCC(Pin22):ExternalPowerInputtoanInternalSwitch

Connected to INTVCC. This switch closes and supplies VCC

power, bypassing the internallow dropout regulator, when-

ever EXTVCC is higher than 4.7V. See EXTVCC connection

in Applications section. Do not exceed 7V on this pin.

BG1, BG2 (Pins 23, 19): High Current Gate Drives for Bot-

tom (Synchronous) N-Channel MOSFETs. Voltage swing

at these pins is from ground to INTVCC.

VIN (Pin 24): Main Supply Pin. A bypass capacitor should

be tied between this pin and the signal ground pin.

BOOST1, BOOST2 (Pins 25, 18): Bootstrapped Supplies

to the Top Side Floating Drivers. Capacitors are connected

between the boost and switch pins and Schottky diodes are

tied between the boost and INTVCC pins. Voltage swing at

the boost pins is from INTVCC to (VIN + INTVCC).

SW1, SW2 (Pins 26, 17): Switch Node Connections to

Inductors. Voltage swing at these pins is from a Schottky

diode (external) voltage drop below ground to VIN.

TG1, TG2 (Pins 27, 16): High Current Gate Drives for

Top N-Channel MOSFETs. These are the outputs of ﬂoat-

ing drivers with a voltage swing equal to INTVCC – 0.5V

superimposed on the switch node voltage SW.

PGOOD (Pin 28): Open-Drain Logic Output. PGOOD is

pulled to ground when the voltage on either VOSENSE pin

is not within

±7.5% of its set point.

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