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LTC3707IGN Scheda tecnica(PDF) 20 Page - Linear Technology |
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LTC3707IGN Scheda tecnica(HTML) 20 Page - Linear Technology |
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20 / 32 page ![]() LTC3707 20 3707fb APPLICATIONS INFORMATION By pulling both RUN/SS pins below 1V and/or pulling the STBYMD pin below 0.2V, the LTC3707 is put into low current shutdown (IQ = 20μA). The RUN/SS pins can be driven directly from logic as shown in Figure 7. Diode D1 in Figure 7 reduces the start delay but allows CSS to ramp up slowly providing the soft-start function. Each RUN/SS pin has an internal 6V zener clamp (See Functional Diagram). Fault Conditions: Overcurrent Latchoff The RUN/SS pins also provide the ability to latch off the controller(s) when an overcurrent condition is detected. The RUN/SS capacitor, CSS, is used initially to turn on and limit the inrush current. After the controller has been started and been given adequate time to charge up the output capacitor and provide full load current, the RUN/SS capacitor is used for a short-circuit timer. If the regulator’s output voltage falls to less than 70% of its nominal value after CSS reaches 4.2V, CSS begins discharging on the as- sumption that the output is in an overcurrent condition. If the condition lasts for a long enough period as determined by the size of the CSS and the specified discharge current, the controller will be shut down until the RUN/SS pin volt- age is recycled. If the overload occurs during start-up, the time can be approximated by: tLO1 ≈ [CSS(4.1 – 1.5 + 4.1 – 3.5)]/(1.2μA) = 2.7 • 106 (CSS) If the overload occurs after start-up the voltage on CSS will begin discharging from the zener clamp voltage: tLO2 ≈ [CSS (6 – 3.5)]/(1.2μA) = 2.1 • 106 (CSS) This built-in overcurrent latchoff can be overridden by providing a pull-up resistor to the RUN/SS pin as shown in Figure 7. This resistance shortens the soft-start period and prevents the discharge of the RUN/SS capacitor during an over current condition. Tying this pull-up resistor to VIN as in Figure 7a, defeats overcurrent latchoff. Diode- connecting this pull-up resistor to INTVCC , as in Figure 7b, eliminates any extra supply current during controller shutdown while eliminating the INTVCC loading from preventing controller start-up. Why should you defeat overcurrent latchoff? During the prototyping stage of a design, there may be a problem with noise pickup or poor layout causing the protection circuit to latch off. Defeating this feature will easily allow troubleshooting of the circuit and PC layout. The internal short-circuit and foldback current limiting still remains active, thereby protecting the power supply system from failure. After the design is complete, a decision can be made whether to enable the latchoff feature. The value of the soft-start capacitor CSS may need to be scaled with output voltage, output capacitance and load current characteristics. The minimum soft-start capaci- tance is given by: CSS > (COUT )(VOUT) (10 –4) (RSENSE) The minimum recommended soft-start capacitor of CSS = 0.1μF will be sufficient for most applications. Fault Conditions: Current Limit and Current Foldback The LTC3707 current comparator has a maximum sense voltage of 75mV resulting in a maximum MOSFET cur- rent of 75mV/RSENSE. The maximum value of current limit generally occurs with the largest VIN at the highest ambient temperature, conditions that cause the highest power dissipation in the top MOSFET. The LTC3707 includes current foldback to help further limit load current when the output is shorted to ground. The foldback circuit is active even when the overload shutdown latch described above is overridden. If the output falls below 70% of its nominal output level, then the maximum sense voltage is progressively lowered from 75mV to 25mV. Under short-circuit conditions with very low duty cycles, the LTC3707 will begin cycle skipping in order to limit the short-circuit current. In this situation the bottom MOSFET will be dissipating most of the power 3.3V OR 5V RUN/SS VIN INTVCC RUN/SS D1 CSS RSS* CSS RSS* 3707 F07 *OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF Figure 7. RUN/SS Pin Interfacing (a) (b) |
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