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TMS320VC5505 Scheda tecnica(PDF) 7 Page - Texas Instruments |
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TMS320VC5505 Scheda tecnica(HTML) 7 Page - Texas Instruments |
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7 / 141 page ![]() TMS320VC5505 Fixed-Point Digital Signal Processor www.ti.com SPRS503A – JUNE 2009 – REVISED JULY 2009 SEE ADDITIONS/MODIFICATIONS/DELETIONS Section 4.4 • Updated/Changed the Bootloader process steps Boot Sequence • Updated/Changed Figure 4-1, Bootloader Software Architecture Section 4.4.2 • Deleted "Also, at the beginning of the boot process ..." paragraph Boot Configuation • Added "At hardware reset, all ..." paragraph to the end of subsection Section 4.5 Section 4.5.1, Device and Peripheral Configurations at Device Reset: Configurations at Reset • Updated/Changed lead-in paragraph • Added "This device also has RESERVED ..." paragraph Table 4-2, Default Functions Affected by Device Configuration Pins: • Deleted WAKEUP row Section 4.6 Section 4.6, Configurations After Reset: Configurations After Reset • Updated/Changed paragraph Section 4.6.1, External Bus Selection Register (EBSR): • Updated/Changed the first paragraph Section 4.6.2, EMIF and USB System Control Registers (ESCR and USBSCR) [1C33h and 1C32h]: • Updated/Changed the first paragraph Section 4.6.4, Pull-up/Pull-down Inhibit Registers (PDINHIBR1/2/3) [1C17h, 1C18h, and 1C19h, respectively]: • Updated/Changed the first paragraph Section 4.6.5, Output Slew Rate Control Register (OSRCR) [1C16h]: • Deleted "control" for the "The output slew rate control ..." sentence Section 4.8 Section 4.8.1, Pullup/Pulldown Resistors: Debugging Considerations • Updated/Changed "The DSP features internal ..." sentence in the first paragraph • Updated/Changed the "For the configuration pins (listed ..." paragraph Section 4.8.2, CLKOUT Pin: • Updated/Changed the "Note: the bootloader ..." paragraph • Updated/Changed the "For more detailed information on the CLKOUT Control ..." paragraph Section 5 Section 5.1, Absolute Maximum Ratings Over Operating Case Temperature Range: Device Operating • Updated/Changed the "Input and Output voltage ranges:" Conditions • Added Device Operating Life Power-On Hours (POH) rows for Commercial and Industrial temperature ranges • Added associated POH footnote Section 5.3, Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Temperature: • Updated/Changed the ISD "Input current shutdown, ANA_LDO" to "ANA_LDO shutdown current" • Updated/Changed the ISD TEST CONDITIONS from "ANA_LDOI = MIN" to "ANA_LDOI = VMIN" • Updated/Changed the IILPU input only pin, internal pulldown or pullup disabled MAX value of "±1 µA" to a MIN and MAX value of "-5 and +5 µA", respectively • Added an IIHPD input only pin, internal pulldown or pullup disabled row • Updated/Changed the IIH/IIL , Input current [DC], ALL pins MIN value from "-10" to "-5" µA • Updated/Changed the IIH/IIL , Input current [DC], ALL pins MAX value from "-10" to "-5" µA • Updated/Changed the IOH TEST CONDITIONS for "GPAIN[3:0] to GPAIN[3:1] (GPAIN0 ..." • Updated/Changed the IOL, Low-level output current [DC] GPAIN[3:0] internal regulator MAX value from "+4 µA" to "+4 mA" • Updated/Changed the IOZ, All Pins (except USB and GPAIN[3:0]) MAX value of "±20 µA" to a MIN and MAX value of "-10 and +10 µA", respectively • Updated/Changed the IOZ, GPAIN[3:0] pins MAX value of "±20 µA" to a MIN and MAX value of "-10 and +10 µA", respectively Section 5.3, Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Temperature: • Updated/Changed the ICDD, Core (CVDD) supply current, CVDD = 1.3 V, DSP clock = 100 MHz TYP value to "0.22 mW/MHz" • Updated/Changed the ICDD, Core (CVDD) supply current, CVDD = 1.05 V, DSP clock = 60 MHz TYP value to "0.15 mW/MHz" • Added "Active, " to the TEST CONDITIONS description for both CVDD = 1.3 V and CVDD = 1.05 V Submit Documentation Feedback Revision History 7 |
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