TVP6000CPFP datasheet(15/57 Pages) TI

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2–3

2.2

I2C Interface

The I2C interface is used to access the internal registers of the TVP6000 encoder. This two pin interface

consists of one clock line, SCL, and one serial data line, SDA. The basic I2C access cycles are shown in

Figure 2–3.

Start Condition (S)

Stop Condition (P)

SDA

SCL

Figure 2–2. I2C Start and Stop Conditions

The basic access cycle consists of the following:

A start condition

A slave address cycle

A subaddress cycle

Any number of data cycles

A stop condition

The start and stop conditions are shown in Figure 2–2. The high-to-low transition of SDA while SCL is high,

defines the start condition. The low-to-high transition of SDA while SCL is high, defines the stop condition.

Each cycle, data or address, consists of 8 bits of serial data followed by one acknowledge bit generated by

the receiving device. Thus, each data/address cycle contains nine bits as shown in Figure 2–3.

SCL

SDA

MSB

Slave Address

Subaddress

Data

Stop

345

Acknowledge

Figure 2–3. I2C Access Cycles

As indicated in Figure 2–3, following a start condition, each I2C device decodes the slave address. The

TVP6000 responds with an acknowledge by pulling the SDA line low during the ninth clock cycle, if it

decodes the address as its address. During subsequent subaddress and data cycles, the TVP6000

responds with an acknowledge as shown in Figure 2–3. The subaddress is auto-incremented after each

data cycle.

The transmitting device must not drive the SDA signal during the acknowledge cycle so that the receiving

device may drive the SDA signal low. The not acknowledge, A, condition is indicated by the master by

keeping the SDA signal high just before it asserts the stop, P, condition. This sequence terminates a read

cycle as shown in Figure 2–5.

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