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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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STM32W108CB Scheda tecnica(PDF) 66 Page - STMicroelectronics |
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STM32W108CB Scheda tecnica(HTML) 66 Page - STMicroelectronics |
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66 / 179 page  Serial interfaces STM32W108CB, STM32W108HB 66/179 Doc ID 16252 Rev 2 7.2.4 Serial controller interrupt mode register (SCx_INTMODE) Address offset: 0xA854 (SC1_INTMODE) and 0xA858 (SC2_INTMODE) Reset value: 0x0000 0000 7.3 SCI master mode registers 7.3.1 Serial data register (SCx_DATA) Address offset: 0xC83C (SC1_DATA) and 0xC03C (SC2_DATA) Reset value: 0x0000 0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_TX IDLEL EVEL SC_TX FREEL EVEL SC_RX VALLE VEL rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [2] SC_TXIDLELEVEL: Transmitter idle interrupt mode 0: Edge triggered 1: Level triggered. [1] SC_TXFREELEVEL: Transmit buffer free interrupt mode 0: Edge triggered 1: Level triggered. [0] SC_RXVALLEVEL: Receive buffer has data interrupt mode 0: Edge triggered 1: Level triggered. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_DATA rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [7:0] SC_DATA: Transmit and receive data register. Writing to this register adds a byte to the transmit FIFO. Reading from this register takes the next byte from the receive FIFO and clears the overrun error bit if it was set. In UART mode (SC1 only), reading from this register loads the UART status register with the parity and frame error status of the next byte in the FIFO, and clears these bits if the FIFO is now empty. |
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