STM32W108CB datasheet(108/179 Pages) STMICROELECTRONICS

108 / 179 page

General-purpose timers

STM32W108CB, STM32W108HB

108/179

Doc ID 16252 Rev 2

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Initialize Timer 2 to 0xE7 by writing 0xE7 in the Timer 2 counter (TIM2_CNTL).

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Enable Timer 2 by writing 1 in the TIM_CEN bit (TIM2_CR1 register).

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Start Timer 1 by writing 1 in the TIM_CEN bit (TIM1_CR1 register).

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Stop Timer 1 by writing 0 in the TIM_CEN bit (TIM1_CR1 register).

Figure 42.

Gating timer 2 with enable of timer 1

Using one timer to start the other timer

In this example, the enable of Timer 2 is set with the update event of Timer 1. Refer to

Figure 40 for connections. Timer 2 starts counting from its current value (which can be non-

zero) on the divided internal clock as soon as Timer 1 generates the update event.

When Timer 2 receives the trigger signal its TIM_CEN bit is automatically set and the

counter counts until 0 is written to the TIM_CEN bit in the TIM2_CR1 register. Both counter

clock frequencies are divided by 3 by the prescaler compared to CK_INT (fCK_CNT =

fCK_INT/3).

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Configure Timer 1 in master mode to send its update event as trigger output

(TIM_MMS = 010 in the TIM1_CR2 register).

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Configure the Timer 1 period (TIM1_ARR register).

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Configure Timer 2 to get the input trigger from Timer 1 (TIM_TS = 000 in the

TIM2_SMCR register).

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Configure Timer 2 in trigger mode (TIM_SMS = 110 in the TIM2_SMCR register).

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Start Timer 1: Write 1 in the TIM_CEN bit (TIM1_CR1 register).

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