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ADS58C48IPFPR Scheda tecnica(PDF) 45 Page - Texas Instruments |
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ADS58C48IPFPR Scheda tecnica(HTML) 45 Page - Texas Instruments |
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45 / 70 page ![]() 64.1 64.1 64.4 64.4 64.4 64.7 64.7 64.7 65 65 65 65.3 65.3 65.3 65.6 65.6 65.6 65.9 65.9 65.9 66.2 66.2 66.2 66.5 66.5 66.5 66.8 66.8 20 50 150 200 Input Frequency (MHz) SNR (dBFS) 250 350 500 80 100 120 140 160 180 200 63 64 65 M0048-31 62 66 100 300 68 450 400 67 62. 63 63 63 63.3 63.3 63.3 63.6 63.6 63.6 63.9 63.9 63.9 64.2 64.2 64.2 64.5 64.5 64.8 20 50 150 200 Input Frequency (MHz) SNR (dBFS) 250 350 500 80 100 120 140 160 180 200 62.5 63 63.5 M0048-32 64.5 100 300 66 450 400 65 64 65.5 ADS58C48 www.ti.com SLAS689 – MAY 2010 TYPICAL CHARACTERISTICS (continued) All plots are at 25°C, AVDD = 1.8 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock. 1.5 VPP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, High Perf Mode disabled, 0 dB gain, DDR LVDS output interface, 32k point FFT (unless otherwise noted) SNR vs INPUT FREQUENCY AND SAMPLING FREQUENCY Figure 49. SNR CONTOUR, 0-dB GAIN SNR vs INPUT FREQUENCY AND SAMPLING FREQUENCY Figure 50. SNR CONTOUR, 6-dB GAIN Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Link(s) :ADS58C48 |
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