FS401LF datasheet(14/104 Pages) ETC2

14 / 104 page

FS401, FS403

PRODUCT SPECIFICATION

REV. NO. 1.7

JANUARY 24, 2007

Pin Name

Pin Number

FS401/FS403

Type/Value

Pin Function Description

OSDCLK

403 only

x/19

LVTTL

output

OSD clock. Output clock to external microprocessor to

synchronize OSD data.

Video Outputs

Y/R/V

12/11

analog

video

Video output. As programmed by Command Register

OFMT1-0 bits:

00 Luminance component Y of S-video.

01 Red component of RGB.

1X V component of YUV

CVBS/G/Y

15/14

analog

video

Video output. As programmed by Command Register

OFMT1-0 bits:

00 Composite video.

01 Green component of RGB.

1X Y component of YUV.

C/B/U

17/16

analog

video

Video output. As programmed by Command Register

OFMT1-0 bits:

00 Chrominance component of S-video.

01 Blue component of RGB.

1X U component of YUV.

CSYNC

20/20

LVTTL

output

Composite sync output. Digital composite sync for YUV

and RGB/SCART video outputs. High impedance (tri-state)

when powered down.

TV_HSYNC

32/39

LVTTL

output

Horizontal sync output. Digital horizontal sync for YUV,

RGB/SCART, and progressive video outputs. High

impedance (tri-state) when powered down. Note:

multiplexed with R1 on FS403 (see above).

TV_VSYNC

31/38

LVTTL

output

Vertical sync output. Digital horizontal sync for YUV,

RGB/SCART, and progressive video outputs. High

impedance (tri-state) when powered down. Note:

multiplexed with R0 on FS403 (see above).

D/A Voltage Reference

CCOMP

8/7

+1.235 V

Voltage reference input/output. If unconnected, except

for a 0.1µF capacitor to VDDDA for noise decoupling, the

internal 1.235 Volt band-gap reference will be supplied to

the three D/A Converters. An external 1.235 volt reference

connected to CCOMP will override the internal voltage

reference.

IREF

9/8

392/787

Ω

Current Reference. A resistor between IREF and VSSDA sets

the current range of the D/A converters. Use 392

Ω for a

37.5

Ω load and 787Ω for a 75Ω load.

CBYPASS

11/10

0.1

µF

Bypass Capacitor. A 0.1µF capacitor must be connected

between CBYPASS and VDDDA to reduce noise at the D/A

outputs.

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