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PIC16F720-E/ML Scheda tecnica(PDF) 50 Page - Microchip Technology

Il numero della parte PIC16F720-E/ML
Spiegazioni elettronici  20-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  244 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F720-E/ML Scheda tecnica(HTML) 50 Page - Microchip Technology

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PIC16F/LF720/721
DS41430A-page 50
 2010 Microchip Technology Inc.
6.1.4
PIN DESCRIPTIONS AND
DIAGRAMS
Each PORTA pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the A/D Converter (ADC), refer to the
appropriate section in this data sheet.
6.1.4.1
RA0/AN0/ICSPDAT
Figure 6-1 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• ICSP programming data (separate controls from
TRISA)
• ICD Debugging data (separate controls from
TRISA)
6.1.4.2
RA1/AN1/ICSPCLK
Figure 6-2 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• ICSP programming clock (separate controls from
TRISA)
• ICD Debugging clock (separate controls from
TRISA)
6.1.4.3
RA2/AN2/T0CKI/INT
Figure 6-3 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
• external interrupt
• clock input for Timer0
The Timer0 clock input function works independently of
any TRIS register setting. Effectively, if TRISA2 = 0,
the PORTA2 register bit will output to the pad and Clock
Timer0 at the same time.
6.1.4.4
RA3/MCLR/VPP
Figure 6-4 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• Master Clear Reset with weak pull-up
6.1.4.5
RA4/AN3/T1G/CLKOUT
Figure 6-5 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• analog input for the ADC
• Timer1 gate input
• clock output
6.1.4.6
RA5/T1CKI/CLKIN
Figure 6-6 shows the diagram for this pin. This pin is
configurable to function as one of the following:
• a general purpose I/O
• Timer1 Clock input
• clock input



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