PIC16F720-ESLASHML datasheet(56/244 Pages) MICROCHIP

56 / 244 page

PIC16F/LF720/721

DS41430A-page 56

 2010 Microchip Technology Inc.

6.2

PORTB and TRISB Registers

PORTB is an 8-bit wide, bidirectional port. The

corresponding

data

direction

TRISB

(Register 6-7). Setting a TRISB bit (= 1) will make the

corresponding PORTB pin an input (i.e., put the

corresponding output driver in a High-Impedance mode).

Clearing a TRISB bit (= 0) will make the corresponding

PORTB pin an output (i.e., enable the output driver and

put the contents of the output latch on the selected pin).

Example 6-2 shows how to initialize PORTB.

Reading the PORTB register (Register 6-6) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then written

to the PORT data latch.

The TRISB register (Register 6-7) controls the PORTB

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISB register are maintained set when using them as

analog inputs. I/O pins configured as analog input always

read ‘0’. Example 6-2 shows how to initialize PORTB.

EXAMPLE 6-2:

INITIALIZING PORTB

6.2.1

ANSELB REGISTER

The ANSELB register (Register 6-10) is used to

configure the Input mode of an I/O pin to analog.

Setting the appropriate ANSELB bit high will cause all

digital reads on the pin to be read as ‘0’ and allow

analog functions on the pin to operate correctly.

The state of the ANSELB bits has no affect on digital

output functions. A pin with TRIS clear and ANSELB

set will still operate as a digital output, but the Input

mode will be analog. This can cause unexpected

behavior

when

executing

read-modify-write

instructions on the affected port.

6.2.2

WEAK PULL-UPS

Each of the PORTB pins has an individually configurable

internal weak pull-up. Control bits WPUB<7:4> enable or

disable each pull-up (see Register 6-8). Each weak pull-

up is automatically turned off when the port pin is

configured as an output. All pull-ups are disabled on a

Power-on Reset by the RABPU bit of the OPTION

6.2.3

INTERRUPT-ON-CHANGE

All of the PORTB pins are individually configurable as an

interrupt-on-change pin. Control bits IOCB<7:4> enable

or disable the interrupt function for each pin. Refer to

The

interrupt-on-change

feature

disabled on a Power-on Reset.

For enabled interrupt-on-change pins, the present value

is compared with the old value latched on the last read

of PORTB to determine which bits have changed or

mismatched the old value. The ‘mismatch’ outputs of

the last read are OR’d together to set the PORTB

Change Interrupt Flag bit (RABIF) in the INTCON

This interrupt can wake the device from Sleep. The user,

in the Interrupt Service Routine, clears the interrupt by:

Any read or write of PORTB. This will end the

mismatch condition.

Clear the flag bit RABIF.

A mismatch condition will continue to set flag bit RABIF.

Reading or writing PORTB will end the mismatch

condition and allow flag bit RABIF to be cleared. The latch

holding the last read value is not affected by a MCLR nor

Brown-out Reset. After these Resets, the RABIF flag will

continue to be set if a mismatch is present.

Note:

The ANSELB register must be initialized

to configure an analog channel as a digital

input. Pins configured as analog inputs

will read ‘0’.

BANKSEL PORTB

;

CLRF

PORTB

;Init PORTB

BANKSEL ANSELB

CLRF

ANSELB

;Make RB<7:4> digital

BANKSEL TRISB

;

MOVLW

’11110000’;Set RB<7:4> as inputs

MOVWF

TRISB

;

Note:

When a pin change occurs at the same

time as a read operation on PORTB, the

RABIF flag will always be set. If multiple

PORTB pins are configured for the

interrupt-on-change, the user may not be

able to identify which pin changed state.

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