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MB90F482BPMC Scheda tecnica(PDF) 19 Page - fujitsu semiconductor |
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MB90F482BPMC Scheda tecnica(HTML) 19 Page - fujitsu semiconductor |
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19 / 124 page ![]() MB90480B/485B Series DS07-13722-11E 19 ■ MEMORY MAP • MB90F481B/F482B/487B/488B/483C/F488B/V480B/V485B/F489B *1 : No memory cells from FC0000H to FC7FFFH and FE0000H to FE7FFFH. The upper part of the 00 bank is set up to mirror the image of FF bank ROM, to enable efficient use of small model C compilers. Because the lower 16-bit address of the FF bank and the lower 16-bit address of the 00 bank are the same, enabling reference to tables in ROM without using the for specification in the pointer declaration. For example, in accessing address 00C000H it is actually the contents of ROM at FFC000H that are accessed. If the MS bit in the ROMM register is set to “0”, the ROM area in the FF bank will exceed 48 Kbytes and it is not possible to reflect the entire area in the image in the 00 bank. Therefore the image from FF4000H to FFFFFFH is reflected in the 00 bank and the area from FF0000H to FF3FFFH can be seen in the FF bank only. (Continued) Model Address #1 Address #2 Address #3 MB90F481B FC0000H *1 004000H or 008000H, selected by the MS bit in the ROMM register 001100H MB90F482B FC0000H 001900H MB90487B FD0000H 002900H MB90488B FC0000H 002900H MB90F488B FC0000H 002900H MB90V480B (FC0000H) 004000H MB90V485B (FC0000H) 004000H MB90483C FB0000H*4 004000H MB90F489B F90000H *2 0080000H fixed 006100H*3 FFFFFFH 010000H 000100H 0000D0H 000000H RAM * RAM RAM ROM area ROM area ROM area FF bank image ROM area FF bank image Peripheral Peripheral Peripheral Single chip Internal ROM external bus External ROM external bus Address #1 Address #3 Register : Internal : External : Access inhibited Address #2 * : In models where address #3 overlaps with address #2, this external area does not exist. Register Register |
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