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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SN8A1702AX Scheda tecnica(PDF) 85 Page - SONiX Technology Company |
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SN8A1702AX Scheda tecnica(HTML) 85 Page - SONiX Technology Company |
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85 / 112 page  Preliminary SN8P1702A/SN8P1703A 8-bit micro-controller build-in 12-bit ADC SONiX TECHNOLOGY CO., LTD Page 85 Revision 0.5 MULTI-INTERRUPT OPERATION In most conditions, the software designer uses more than one interrupt request. Processing multi-interrupt request needs to set the priority of these interrupt requests. The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the IRQ flag set doesn’t mean the system to execute the interrupt vector. The IRQ flags can be triggered by the events without interrupt enable. Just only any the event occurs and the IRQ will be logic “1”. The IRQ and its trigger event relationship is as the below table. Interrupt Name Trigger Event Description P00IRQ P0.0 trigger. Falling/Rising/Both. TC0IRQ TC0C overflow. TC1IRQ TC1C overflow. There are two things need to do for multi-interrupt. One is to make a good priority for these interrupt requests. Two is using IEN and IRQ flags to decide executing interrupt service routine or not. Users have to check interrupt control bit and interrupt request flag in interrupt vector. There is a simple routine as following. |
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