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SST30VR021 Scheda tecnica(PDF) 7 Page - Silicon Storage Technology, Inc

Il numero della parte SST30VR021
Spiegazioni elettronici  2 Mbit ROM 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo
PDF  12 Pages
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Produttore elettronici  SST [Silicon Storage Technology, Inc]
Homepage  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST30VR021 Scheda tecnica(HTML) 7 Page - Silicon Storage Technology, Inc

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Data Sheet
2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM
ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
7
©2001 Silicon Storage Technology, Inc.
S71135-02-000
4/01
380
II. SRAM Operation
(ROMCS# = VIH)
TABLE
6: READ CYCLE TIMING PARAMETERS VDD = 3.0V±0.3
Symbol
Parameter
SST30VR022-70
SST30VR021/023-500
Units
Min
Max
Min
Max
TRC
Read Cycle Time
70
500
ns
TAA
Address Access Time
70
500
ns
TCO
Chip Select to Output
70
500
ns
TOE
Output Enable to Valid Output
35
250
ns
TLZ
Chip Select to Low-Z Output
0
25
ns
THZ
Chip Disable to High-Z Output
25
30
ns
TOHZ
Output Disable to High-Z Output
25
30
ns
TOH
Output Hold from Address Change
10
15
ns
T6.2 380
TABLE
7: WRITE CYCLE TIMING PARAMETERS VDD = 3.0V±0.3
Symbol
Parameter
SST30VR022-70
SST30VR021/023-500
Units
Min
Max
Min
Max
TWC
Write Cycle Time
70
500
ns
TCW
Chip Select to End-of-Write
60
365
ns
TAW
Address Valid to End-of-Write
60
375
ns
TAS
Address Set-up Time
0
0
ns
TWP
Write Pulse Width
60
375
ns
TWR
Write Recovery Time
0
0
ns
TWHZ
Write to Output High-Z
30
80
ns
TDW
Data to Write Time Overlap
30
200
ns
TDH
Data Hold from Write Time
0
0
ns
TOW
End Write to Output Low-Z
0
15
ns
T7.1 380



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