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CXP83508 Scheda tecnica(PDF) 8 Page - Sony Corporation |
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CXP83508 Scheda tecnica(HTML) 8 Page - Sony Corporation |
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8 / 30 page ![]() – 8 – CXP83508/83512/83516, CXP83509/83513/83517 ∗ Pull-up transistor approx. 100k Ω (VDD = 4.5 to 5.5V) approx. 150k Ω (VDD = 2.7 to 3.3V) IP Pull-up resistor Port B data Port B direction "0" after a reset RD (Port B) "0" after a reset ∗ Internal data bus ∗ Pull-up transistor approx. 100k Ω (VDD = 4.5 to 5.5V) approx. 150k Ω (VDD = 2.7 to 3.3V) IP Pull-up resistor Port B data Port B direction "0" after a reset RD (Port B) "0" after a reset ∗ Internal data bus CS0 SI0 SI1 Schmitt input Port B 8 pins Hi-Z Hi-Z After a reset PA0/AN0 to PA7/AN7 PB0 Port B 1 pin 3 pins Hi-Z PB1/CS0 PB3/SI0 PB6/SI1 ∗ Pull-up transistor approx. 100k Ω (VDD = 4.5 to 5.5V) approx. 150k Ω (VDD = 2.7 to 3.3V) IP Pull-up resistor Port A data Port A direction "0" after a reset Port A function select "0" after a reset RD (Port A) A/D converter Input multiplexer "0" after a reset Input protection circuit ∗ Edge detection circuit Internal data bus Standby release I/O Circuit Format for Pins Port A Pin Circuit format |
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