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CXP87452 Scheda tecnica(PDF) 17 Page - Sony Corporation |
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CXP87452 Scheda tecnica(HTML) 17 Page - Sony Corporation |
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17 / 32 page ![]() – 17 – CXP87452/87460 ∗ tsys indicates three values according to the contents of the clock control register (address; 00FE H ) upper 2 bits (CPU clock selection). tsys [ns] = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits = "11") XTAL tXH tXL tCF tCR 0.4V VDD – 0.4V 1/fc EXTAL Crystal oscillation Ceramic oscillation EXTAL XTAL External clock EXTAL XTAL 74HC04 C1 C2 AC Characteristics (1) Clock timing System clock frequency System clock input pulse width System clock input rising and falling times Event count clock input pulse width Event count clock input rising and falling times fC tXL, tXH tCR, tCF tEL, tEH tER, tEF XTAL EXTAL XTAL EXTAL XTAL EXTAL PE1/EC PE1/EC MHz ns ns ns ms Item Symbol Pin Condition Unit Fig. 1, Fig. 2 Fig. 1, Fig. 2 (External clock drive) Fig. 1, Fig. 2 (External clock drive) Fig. 3 Fig. 3 Min. 1 1 28 37.5 tsys × 4∗ Max. 16 12 200 20 (Ta = –20 to +75°C, VDD = 3.0 to 5.5V, Vss = 0V) Fig. 1. Clock timing VDD = 4.5 to 5.5V VDD = 4.5 to 5.5V Fig. 2. Clock applied condition EC tEH tEL tEF tER 0.2VDD 0.8VDD Fig. 3. Event count clock timing |
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