AD7303 datasheet(7/16 Pages) AD

7 / 16 page

AD7303

–7–

REV. 0

←

DAC A = NORMAL OPERATION

DAC B INITIALLY IN POWER

DOWN

VOUT B

SYNC

DAC B EXITING

POWER DOWN

CH1 2V, CH2 5V, M 500ns

VDD = +5V

INTERNAL REFERENCE

TA = 25 C

Figure 12. Exiting Power-Down

(Partial Power-Down)

Input Code (10 to 245)

255

128 160

192

224

DAC B

DAC A

VDD = +5V

INTERNAL REFERENCE

Ω 100pF LOAD

LIMITED CODE RANGE (10-245)

TA = 25°C

–0.5

0.4

0.1

–0.1

–0.3

–0.4

0.3

0.2

–0.2

0.5

Figure 15. Integral Linearity Plot

0.5

1.5

2.5

3.5

4.5

VDD = +5V

VDD = +3V

Figure 13. Supply Current vs.

Logic Input Voltage

VDD = +5V

INTERNAL REFERENCE

0.5

0.4

0.3

0.2

0.1

–0.1

–0.2

–0.3

–0.4

–0.5

–60 –40 –20

80 100 120 140

TEMPERATURE – C

Figure 16. Typical INL vs.

Temperature

VOUT

CH1 5.00V, CH2 50.0mV, M 250ns

SYNC

VDD = +5V

INTERNAL VOLTAGE

REFERENCE

10 LSB STEP CHANGE

TA = 25 C

Figure 14. Small Scale Settling

Time

VDD = +5V

INTERNAL REFERENCE

0.5

0.4

0.3

0.2

0.1

–0.1

–0.2

–0.3

–0.4

–0.5

–60 –40 –20

80 100 120 140

TEMPERATURE – C

Figure 17. Typical DNL vs.

Temperature

TEMPERATURE – C

500

400

200

100

300

–50

100

150

VDD = +5.5V

VIL AND VIH = 0V OR VDD

–25

125

Figure 19. Power-Down Current vs.

Temperature

VDD = +5V

0.6

0.4

0.2

–60 –40 –20

80 100 120 140

TEMPERATURE – C

0.8

1.0

Figure 18. Typical Internal Reference

Error vs. Temperature

AD7303 Scheda tecnica(PDF) 7 Page - Analog Devices

AD7303 Scheda tecnica(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Scheda tecnica Scarica

Link URL