MC68331MFC16 datasheet(31/84 Pages) FREESCALE

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MC68331TS/D

At reset, either the alternate function (01) or chip-select function (11) can be encoded. DATA pins are

driven to logic level one by a weak internal pull-up during reset. Encoding is for chip-select function un-

less a data line is held low during reset. Note that bus loading can overcome the weak pull-up and hold

pins low during reset. The following table shows the hierarchical selection method that determines the

reset functions of pins controlled by CSPAR1.

A pin programmed as a discrete output drives an external signal to the value specified in the port C pin

data register (PORTC), with the following exceptions:

A. No discrete output function is available on pins BR, BG, or BGACK.

B. ADDR23 provides E-clock output rather than a discrete output signal.

When a pin is programmed for discrete output or alternate function, internal chip-select logic still func-

tions and can be used to generate DSACK or AVEC internally on an address match.

Port size is determined when a pin is assigned as a chip select. When a pin is assigned to an 8-bit port,

the chip select is asserted at all addresses within the block range. If a pin is assigned to a 16-bit port,

the upper/lower byte field of the option register selects the byte with which the chip select is associated.

3.5.3 Base Address Registers

A base address is the starting address for the block enabled by a given chip select. Block size deter-

mines the extent of the block above the base address. Each chip select has an associated base register

so that an efficient address map can be constructed for each application. If a chip-select base address

to that address goes to the module or array and the chip-select signal is not asserted.

BLKSZ —Block Size Field

This field determines the size of the block that must be enabled by the chip select. The following table

shows bit encoding for the base address registers block size field.

Table 15 Reset Pin Function of CS[10:6]

Data Bus Pins at Reset

Chip-Select/Address Bus Pin Function

DATA7

DATA6

DATA5

DATA4

DATA3

CS10/

ADDR23

CS9/

ADDR22

CS8/

ADDR21

CS7/

ADDR20

CS6/

ADDR19

11111

CS10

CS9

CS8

CS7

CS6

1111

CS10

CS9

CS8

CS7

ADDR19

111

CS10

CS9

CS8

ADDR20 ADDR19

CS10

CS9

ADDR21 ADDR20 ADDR19

CS10

ADDR22 ADDR21 ADDR20 ADDR19

XXXX

ADDR23 ADDR22 ADDR21 ADDR20 ADDR19

CSBARBT — Chip-Select Base Address Register Boot ROM

$YFFA48

ADDR

BLKSZ

RESET:

CSBAR[10:0] —Chip-Select Base Address Registers

$YFFA4C–$YFFA74

ADDR

BLKSZ

RESET:

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