PCIF0 datasheet(44/294 Pages) ATMEL

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9219A–RFID–01/11

Atmel ATA5505 [Preliminary]

It is set when ‘Clock Availability’ logic confirms that the (selected) clock is running and is sta-

ble. The delay from the request and the flag setting is not fixed, it depends on the clock

start-up time, the clock frequency and, of course, if the clock is alive. The user’s code has to

differentiate between ‘no_clock_signal’ and ‘clock_signal_not_yet_available’ condition.

• Bits 3:0 – CLKC3:0: Clock Control Bits 3 - 0

These bits define the command to provide to the ‘Clock Switch’ module. The special write pro-

cedure must be followed to change the CLKC3..0 bits (See ”Bit 7 – CLKCCE: Clock Control

Change Enable” on page 43.).

Write the Clock Control Change Enable (CLKCCE) bit to one and all other bits in

CLKCSR to zero.

Within 4 cycles, write the desired value to CLKCSR register while clearing CLKCCE

bit.

Interrupts should be disabled when setting CLKCSR register in order not to disturb the

procedure.

4.5.4

CLKSELR - Clock Selection Register

• Bit 7– Res: Reserved Bit

This bit is reserved bit in the Atmel

® AVR® and will always read as zero.

• Bit 6 – COUT: Clock Out

The COUT bit is initialized with ~(CKOUT) Fuse bit.

The COUT bit is only used in case of ‘CKOUT’ command. Refer to Section 4.2.7 “Clock Output

Buffer” on page 35 for using.

In case of ‘Recover System Clock Source’ command, COUT it is not affected (no recovering of

this setting).

Table 4-11.

Clock command list.

Clock Command

CLKC3..0

No command

0000

Disable clock source

0001

Enable clock source

0010 b

Request for clock

availability

0011

Clock source switch

0100

Recover system clock source code

0101 b

Enable watchdog in automatic reload mode

0110

CKOUT command

0111 b

No command

1xxx b

Bit

543

210

COUT

CSUT1

CSUT0

CSEL3

CSEL2

CSEL1

CSEL0

CLKSELR

Read/Write

R/W

Initial Value

~ (CKOUT)

fuse

SUT1..0

fuses

CKSEL3..0

fuses

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