PIC16F628A-IP datasheet(80/180 Pages) MICROCHIP

80 / 180 page

PIC16F627A/628A/648A

DS40044G-page 80

FIGURE 12-1:

USART TRANSMIT BLOCK DIAGRAM

Follow these steps when setting up an Asynchronous

Transmission:

TRISB<1> and TRISB<2> should both be set to

‘1’ to configure the RB1/RX/DT and RB2/TX/CK

pins as inputs. Output drive, when required, is

controlled by the peripheral circuitry.

Initialize the SPBRG register for the appropriate

baud rate. If a high-speed baud rate is desired,

set bit BRGH. (Section 12.1 “USART Baud

Rate Generator (BRG)”

Enable the asynchronous serial port by clearing

bit SYNC and setting bit SPEN.

If interrupts are desired, then set enable bit

TXIE.

If 9-bit transmission is desired, then set transmit

bit TX9.

Enable the transmission by setting bit TXEN,

which will also set bit TXIF.

If 9-bit transmission is selected, the ninth bit

should be loaded in bit TX9D.

Load data to the TXREG register (starts

transmission).

FIGURE 12-2:

ASYNCHRONOUS TRANSMISSION

TXIF

TXIE

Interrupt

TXEN

Baud Rate CLK

SPBRG

Baud Rate Generator

TX9D

MSb

LSb

Data Bus

TXREG register

TSR register

(8)

TX9

TRMT

SPEN

RB2/TX/CK pin

Pin Buffer

and Control

² ² ²

Word 1

Stop bit

Word 1

Transmit Shift Reg.

Start bit

bit 0

bit 1

bit 7/8

Write to TXREG

Word 1

BRG output

(shift clock)

RB2/TX/CK (pin)

TXIF bit

(Transmit buffer

reg. empty flag)

TRMT bit

(Transmit shift

reg. empty flag)

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