EPF8282AV datasheet(5/62 Pages) ALTERA

Il numero della parte	EPF8282AV

Spiegazioni elettronici	Programmable Logic Device Family

PDF	62 Pages

Scroll/Zoom	100%

Produttore elettronici	ALTERA [Altera Corporation]

Homepage	http://www.altera.com

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Altera Corporation

FLEX 8000 Programmable Logic Device Family Data Sheet

Figure 1 shows a block diagram of the FLEX 8000 architecture. Each group

of eight LEs is combined into an LAB; LABs are arranged into rows and

columns. The I/O pins are supported by I/O elements (IOEs) located at

the ends of rows and columns. Each IOE contains a bidirectional I/O

buffer and a flipflop that can be used as either an input or output register.

Figure 1. FLEX 8000 Device Block Diagram

Signal interconnections within FLEX 8000 devices and between device

pins are provided by the FastTrack Interconnect, a series of fast,

continuous channels that run the entire length and width of the device.

IOEs are located at the end of each row (horizontal) and column (vertical)

FastTrack Interconnect path.

IOE

I/O Element

(IOE)

Logic Array

Block (LAB)

Logic

Element (LE)

FastTrack

Interconnect

EPF8282AV Scheda tecnica(PDF) 5 Page - Altera Corporation