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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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EPF8282AV Scheda tecnica(PDF) 6 Page - Altera Corporation |
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EPF8282AV Scheda tecnica(HTML) 6 Page - Altera Corporation |
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6 / 62 page  6 Altera Corporation FLEX 8000 Programmable Logic Device Family Data Sheet Logic Array Block A logic array block (LAB) consists of eight LEs, their associated carry and cascade chains, LAB control signals, and the LAB local interconnect. The LAB provides the coarse-grained structure of the FLEX 8000 architecture. This structure enables FLEX 8000 devices to provide efficient routing, high device utilization, and high performance. Figure 2 shows a block diagram of the FLEX 8000 LAB. Figure 2. FLEX 8000 Logic Array Block Carry-In and Cascade-In from LAB on Left Dedicated Inputs LE1 4 LE8 4 4 LE2 4 4 4 2 2 LE3 4 LE4 4 LE5 4 LE6 4 LE7 4 Column Interconnect Row Interconnect 8 24 LAB Local Interconnect (32 channels) 8 Column-to-Row Interconnect Carry-Out and Cascade-Out to LAB on Right 8 16 LAB Control Signals See Figure 8 for details. |
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