AS5050A datasheet(14/31 Pages) AMSCO

Il numero della parte	AS5050A

Spiegazioni elettronici	Low Power 10-Bit Magnetic Position Sensor

PDF	31 Pages

Scroll/Zoom	100%

Produttore elettronici	AMSCO [ams AG]

Homepage	http://www.ams.com

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14 / 31 page

Page 14

ams Datasheet

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[v2-03] 2014-Jul-31

AS5050A − SPI Inter face

SPI Transaction

An SPI transaction consists of a 16-bit command frame followed

by a 16-bit data frame. Figure 15 shows the structure of the

command frame.

SPI Command Frame

Figure 15:

SPI Command Frame

To increase the reliability of communication over the SPI, an

even parity bit (PAR) must be generated and sent. A wrong

setting of the parity bit causes the PARITY bit in the error status

from the upper 15-bits of the command frame. The 16-bit

command specifies the address and whether the transaction is

a read or a write.

Bit

765432

R/W

Address 14:1

PAR

Bit

Name

Description

R/W

0=Write, 1=Read

14:1

Address

14 bit address to read or write

PAR

Parity bit (even) calculated on the upper 15 bits

AS5050A Scheda tecnica(PDF) 14 Page - ams AG