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HT47C20L Scheda tecnica(PDF) 14 Page - Holtek Semiconductor Inc |
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HT47C20L Scheda tecnica(HTML) 14 Page - Holtek Semiconductor Inc |
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14 / 55 page ![]() HT47C20L 14 January 18, 2000 Once an interrupt subroutine is serviced, all other interrupts will be blocked (by clearing the EMI bit). This scheme may prevent any further interrupt nesting. Other interrupt requests may happen during this interval, but only the interrupt request flag is recorded. If a certain interrupt needs servicing within the service routine, the programmer may set the EMI bit and the corresponding bit of INTC0 or INTC1 al- low interrupt nesting. If the stack is full, the in- terrupt request will not be acknowledged, even if the related interrupt is enabled, until the SP is decremented. If immediate service is desired, the stack must be prevented from becoming full. All these kinds of interrupt have a wake-up ca- pability. As an interrupt is serviced, a control transfer occurs by pushing the program counter onto the stack, followed by a branch to a sub- routine at specified locations in the program memory. Only the program counter is pushed onto the stack. If the contents of the register and status register (STATUS) is altered by the interrupt service program which corrupts the desired control sequence, the contents must be saved first. Register Bit No. Label Function INTC0 (0BH) 0 EMI Control the master (global) interrupt (1=enabled; 0=disabled) 1 EEI Control the external interrupt (1=enabled; 0=disabled) 2 ETBI Control the time base interrupt (1=enabled; 0=disabled) 3 ERTI Control the real time clock interrupt (1=enabled; 0=disabled) 4 EIF External interrupt request flag (1=active; 0=inactive) 5 TBF Time base interrupt request flag (1=active; 0=inactive) 6 RTF Real time clock interrupt request flag (1=active; 0=inactive) 7 ¾ Unused bit, read as ²0² INTC1 (1EH) 0 ETI Control the timer/event counter interrupt (1=enabled; 0=disabled) 1 ¾ Unused bit, read as ²0² 2 ¾ Unused bit, read as ²0² 3 ¾ Unused bit, read as ²0² 4TF Internal timer/event counter interrupt request flag (1=active; 0=inactive) 5 ¾ Unused bit, read as ²0² 6 ¾ Unused bit, read as ²0² 7 ¾ Unused bit, read as ²0² INTC Register |
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