IDT7M1001S40C datasheet(9/11 Pages) IDT

Il numero della parte	IDT7M1001S40C

Spiegazioni elettronici	128K x 8 64K x 8 CMOS DUAL-PORT STATIC RAM MODULE

PDF	11 Pages

Scroll/Zoom	100%

Produttore elettronici	IDT [Integrated Device Technology]

Homepage	http://www.idt.com

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9 / 11 page

IDT7M1001/1003

128K/64K x 8 CMOS DUAL-PORT STATIC RAM MODULE

MILITARY AND COMMERCIAL TEMPERATURE RANGES

7.5

NOTE:

1. L_

CS = R_CS = LOW.

TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT DELAY(1)

SEMAPHORE OPERATION

For more details regarding semaphores & semaphore operations, please consult the IDT7006 datasheet.

ADDR R

R/W R

DATA IN R

VALID

t WC

t WP

MATCH

VALID

t DH

MATCH

t WDD

t DDD

t DW

ADDR L

DATA OUT L

READ CYCLE

RIGHT PORT

WRITE CYCLE LEFT PORT

2804 drw 12

TRUTH TABLES

TABLE I: NON-CONTENTION READ/WRITE CONTROL(1)

Inputs

(1)

Outputs

SEM

I/O0 - I/O7

Mode

High-Z

Deselected: Power Down

DATAIN

Write to Both Bytes

DATAOUT

Read Both Bytes

High-Z

Outputs Disabled

NOTE:

1. AOL — A12

≠ A0R — A12R

2804 tbl 10

TABLE II: SEMAPHORE READ/WRITE CONTROL(1)

Inputs

Outputs

SEM

I/O0 - I/O7

Mode

DATAOUT

Read Data in Semaphore Flag

DATAIN

Write DIN0 into Semaphore Flag

—

Not Allowed

NOTE:

1. AOL — A12

≠ A0R — A12R

2804 tbl 11

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