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AN1625 Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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AN1625 Scheda tecnica(HTML) 5 Page - STMicroelectronics |
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5 / 39 page ![]() 5/39 AN1625 APPLICATION NOTE 2.3 Choosing the Bulk Capacitor Since the bulk capacitor, placed between VS and GND pins, is charged and discharged during IC operation, its AC current capability must be greater than the r.m.s. value of the charge/discharge current. This current flows from the capacitor to the IC during the on-time (tON) and from the IC (during some phase changes; from the power supply during off-time) to the capacitor during the off-time (tOFF). The r.m.s. value of the current flowing into the bulk capacitor depends on peak output current, output current ripple, switching frequency, duty-cycle. It also depends on power supply characteristics. A power supply with poor high frequency performances (or long, inductive connections to the IC) will cause the bulk capacitor to be recharged slowly: the higher the current control switching frequency, the higher the current ripple in the capacitor; r.m.s. current in the capacitor, how- ever, does not exceed the r.m.s. output current. Bulk capacitor value (C) and the ESR determine the amount of voltage ripple on the capacitor itself and on the IC. Neglecting the output current ripple and assuming that during the on-time the capacitor is not recharged by the power supply, the voltage at the end of the on-time is where IOUT is the output current. Usually (if C>100 µF) the capacitance role is much less than the ESR, then supply voltage ripple can be estimated as For Example, if a maximum ripple of 500 mV is allowed and IOUT = 2 A, the capacitor ESR should be lower than Note that additional ripple is due to parasitic inductances on VS PCB tracks (see Voltage Ratings and Operating Range section). Actually, current sunk by VSA and VSB pins of the device is subject to higher peaks due to reverse recovery charge of internal freewheeling diodes. Duration of these peaks is, tough, very short (100÷200 ns) and can be filtered using a small value (100÷200 nF), good quality ceramic capacitor, connected as close as possible to the VSA, VSB and GND pins of the IC. Bulk capacitor will be chosen with maximum operating voltage 25% greater than the maximum supply voltage, considering also power supply tolerances. For example, with a 48 V nominal power supply, with 5% tolerance, maximum voltage is 50.4 V, then operating voltage for the capacitor should be at least 63 V. 2.4 Layout Considerations Working with devices that combine high power switches and control logic in the same IC careful attention has to be paid to the PCB layout. In extreme cases, Power DMOS commutation can induce noises that could cause improper operation in the logic section of the device. Noise can be radiated by high dv/dt nodes or high di/dt paths, or conducted through GND or Supply connections. Logic connections, especially high-impedance nodes (actually all logic inputs, see further), must be kept far from switching nodes and paths. With the L6235, in par- ticular, external components for the charge pump circuitry should be connected together through short paths, since these components are subject to voltage and current switching at relatively high frequency (600 kHz). Pri- mary mean in minimizing conducted noise is working on a good GND layout (see Figure 5). V S I OUT ESR t ON C --------- + ⋅ – I OU T ESR ⋅ ESR 0.5V 2A ------------ 250m Ω = < |
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