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AN2842 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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AN2842 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
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7 / 22 page ![]() AN2842 Approach to the study Doc ID 15110 Rev 1 7/22 Figure 6. Details of current imbalance during steady state operation due to the layout Figure 6 and Figure 7 refer to the normal operation in a PFC configuration of two devices in parallel. The blue and yellow lines refer to the two currents on the devices, the green line to the voltage across the drain and source and fuchsia to the voltage across gate to source. In this case, devices with the same electrical characteristics are tested and as can be observed, if they change their position the waveforms remain the same. This confirms that the position and then the layout are responsible for the behaviors, so they are very important for the operation of parallel devices. In the following figure, the position of the two devices is inverted. Figure 7. Current imbalance due to layout during steady state operation when the device position is changed |
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