List of figures

AN3307

4/37

Doc ID 18186 Rev 4

List of figures

Figure 1.

Example of RAM memory configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 2.

Control flow four-step checking principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 3.

Diagnostic LED timing signal principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 4.

STM32 demo hyper terminal output window in verbose mode . . . . . . . . . . . . . . . . . . . . . . 20

Figure 5.

Integration of startup and periodic runtime self-tests into the application . . . . . . . . . . . . . . 21

Figure 6.

Startup self tests structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 7.

CPU startup self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 8.

Watchdog startup self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 9.

Flash startup self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 10.

RAM startup self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 11.

Scramble test - detailed structure of a single check and fill procedure. . . . . . . . . . . . . . . . 26

Figure 12.

Clock startup self-test subroutine structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 13.

Clock frequency measurement principle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 14.

Periodic runtime self-test initialization structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 15.

Periodic runtime self-test and timebase interrupt service structure . . . . . . . . . . . . . . . . . . 30

Figure 16.

CPU light runtime self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 17.

Stack overflow runtime test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 18.

Clock runtime self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 19.

Partial Flash CRC runtime self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 20.

Partial RAM runtime self-test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Figure 21.

Fault coupling principle used at partial RAM runtime self-test . . . . . . . . . . . . . . . . . . . . . . 35