LT1186FC datasheet(13/16 Pages) LINER

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LT1186F

APPLICATIONS INFORMATION

Figure 2. SPI Interface Timing Specification

DIN

CLK

Hi-Z

′

tDZ

Hi-Z

LT1186F • F02

DOUT

tDO

tCKHI

tDH

tDS

tCSS

tCKS

tCSLO

tDV

tCKLO

tCSH

tCSHI

tCKH

2-Wire Interface (Pulse Mode)

In increment/decrement pulse mode, a logic high at UP/

DN programs the counter into increment mode and each

rising edge of CLK increments the upper six bits of the

counter by one. The counter stops incrementing at

11111100B. A logic low at UP/DN programs the counter

into decrement mode and each rising edge of CLK decre-

ments the upper six bits of the counter by one. The counter

stops decrementing at 00000000B. The last two LSBs are

always zero in this mode. IOUT = (B7B6B5B4B3B2B1B0)

(50

µA)/255. The upper 6-bit counter = B7B6B5B4B3B2and

B1 = B0 = 0. To configure the LT1186F into increment/

decrement mode, tie CS to VCC and pulse the UP/DN pin

once on power-up.

Simplified Lamp Current Programming

A programming block in the LT1186F controls lamp

current, permitting either grounded lamp or floating lamp

configurations. Grounded configurations control lamp

current by directly controlling one-half of actual lamp

current and converting it to a feedback signal to close a

control loop. Floating configurations control lamp current

by directly controlling the Royer’s primary-side converter

current and generating a feedback signal to close a control

loop.

Previous backlighting solutions have used a traditional

error amplifier in the control loop to regulate lamp current.

This approach converted an RMS current into a DC voltage

for the input of the error amplifier. This approach used

several time constants in order to provide stable loop

frequency compensation. This compensation scheme

meant that the loop had to be fairly slow and that output

overshoot with start-up or overload conditions had to be

carefully evaluated in terms of transformer stress and

breakdown voltage requirements.

The LT1186F eliminates the error amplifier concept en-

tirely and replaces it with a lamp current programming

block. This block provides an easy-to-use interface to

program lamp current. The programmer circuit also re-

duces the number of time constants in the control loop by

combining the error signal conversion scheme and fre-

quency compensation into a single capacitor. The control

loop thus exhibits the response of a single pole system,

allows for faster loop transient response and virtually

eliminates overshoot under start-up or overload condi-

tions.

Lamp current is programmed at the input of the program-

mer block, the ICCFL pin. This pin is the input of a shunt

regulator and accepts a DC input current signal of 0

µA to

µA from the DAC. This input signal is converted to a 0µA

to 250

µA source current at the CCFL VC pin. The program-

mer circuit is simply a current-to-current converter with a

gain of five. The typical input current programming range

for 0mA to 6mA lamp current is 0

µA to 50µA.

The ICCFL pin is sensitive to capacitive loading and will

oscillate with capacitance greater than 10pF. For example,

loading the ICCFL pin with a 1× or 10× scope probe causes

oscillation and erratic CCFL regulator operation because

of the probe’s respective input capacitance. A current

meter in series with the ICCFL pin will also produce oscil-

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