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UPD75P4308GS Scheda tecnica(PDF) 44 Page - NEC

Il numero della parte UPD75P4308GS
Spiegazioni elettronici  4-BIT SINGLE-CHIP MICROCONTROLLER
PDF  60 Pages
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Produttore elettronici  NEC [NEC]
Homepage  http://www.nec.com/
Logo NEC - NEC

UPD75P4308GS Scheda tecnica(HTML) 44 Page - NEC

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µPD75P4308
44
DC Programming Characteristics (TA = 25
± 5˚C, VDD = 6.0 ± 0.25 V, VPP = 12.5 ± 0.3 V, VSS = 0V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
High-level input voltage
VIH1
Other than X1, X2
0.7 VDD
VDD
V
VIH2
X1, X2
VDD–0.5
VDD
V
Low-level input voltage
VIL1
Other than X1, X2
0
0.3 VDD
V
VIL2
X1, X2
0
0.4
V
Input leakage current
ILI
VIN = VIL or VIH
10
µA
High-level output voltage
VOH
IOH = – 1 mA
VDD–1.0
V
Low-level output voltage
VOL
IOL = 1.6 mA
0.4
V
VDD supply current
IDD
30
mA
VPP supply current
IPP
MD0 = VIL, MD1 = VIH
30
mA
Cautions 1. Keep VPP to within +13.5 V, including overshoot.
2. Apply VDD before VPP and turn it off after VPP.
AC Programming Characteristics (TA = 25
± 5˚C, VDD = 6.0 ± 0.25 V, VPP = 12.5 ± 0.3 V, VSS = 0 V)
Parameter
Symbol
Note 1
Conditions
MIN.
TYP.
MAX.
Unit
Address setup timeNote 2
tAS
tAS
2
µs
(to MD0
↓)
MD1 setup time (to MD0
↓)tM1S
tOES
2
µs
Data setup time (to MD0
↓)tDS
tDS
2
µs
Address hold timeNote 2
tAH
tAH
2
µs
(from MD0
↑)
Data hold time (from MD0
↑)tDH
tDH
2
µs
MD0
↑ → data output float
tDF
tDF
0
130
ns
delay time
VPP setup time (to MD3
↑)tVPS
tVPS
2
µs
VDD setup time (to MD3
↑)tVDS
tVCS
2
µs
Initial program pulse width
tPW
tPW
0.95
1.0
1.05
ms
Additional program pulse width
tOPW
tOPW
0.95
21.0
ms
MD0 setup time (to MD1
↑)tM0S
tCES
2
µs
MD0
↓ → data output delay time
tDV
tDV
MD0 = MD1 = VIL
1
µs
MD1 hold time (from MD0
↑)tM1H
tOEH
tM1H + tM1R
≥ 50
µs2
µs
MD1 recovery time (from MD0
↓)
tM1R
tOR
2
µs
Program counter reset time
tPCR
—10
µs
X1 input high-, low-level widths
tXH, tXL
—
0.125
µs
X1 input frequency
fX
—
4.19
MHz
Initial mode set time
tI
—2
µs
MD3 setup time (to MD1
↑)tM3S
—2
µs
MD3 hold time (from MD1
↓)tM3H
—2
µs
MD3 setup time (to MD0
↓)tM3SR
—
When program memory is read
2
µs
AddressNote 2
→ data output
tDAD
tACC
When program memory is read
2
µs
delay time
AddressNote 2
→ data output
tHAD
tOH
When program memory is read
0
130
ns
hold time
MD3 hold time (from MD0
↑)tM3HR
—
When program memory is read
2
µs
MD3
↓ → data output float
tDFR
—
When program memory is read
2
µs
delay time
Notes 1.
Symbol of corresponding
µPD27C256A
2.
The internal address signal is incremented by one at the rising edge of the fourth X1 input and is not
connected to a pin.



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