UPD75P4308GS datasheet(12/60 Pages) NEC

12 / 60 page

µPD75P4308

SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE

Setting a stack bank selection (SBS) register for the

µPD75P4308 enables the program memory to be switched

between the Mk I mode and the Mk II mode. This capability enables the evaluation of the

µPD754302 or 754304 using

the

µPD75P4308.

When the SBS bit 3 is set to 1: sets Mk I mode (corresponds to Mk I mode of

µPD754302 and 754304)

When the SBS bit 3 is set to 0: sets Mk II mode (corresponds to Mk II mode of

µPD754302 and 754304)

4.1 Differences between Mk I Mode and Mk II Mode

Table 4-1 lists the differences between the Mk I mode and the Mk II mode of the

µPD75P4308.

Table 4-1. Differences between Mk I Mode and Mk II Mode

Item

Mk I Mode

Mk II Mode

Program counter

PC12-0

Program memory (bytes)

8192

Data memory (bits)

256

× 4

Stack

Stack bank

Memory bank 0

Stack bytes

2 bytes

3 bytes

Instruction

BRA !addr1

Not provided

Provided

CALLA !addr1

Instruction

CALL !addr

3 machine cycles

4 machine cycles

execution time CALLF !faddr

2 machine cycles

3 machine cycles

Supported mask ROM versions

Mk I mode of

µPD754302 and 754304

Mk II mode of

µPD754302 and 754304

Caution The Mk II mode supports 16 Kbytes or more of program area in the 75X and 75XL Series. This

mode allows the software compatibility with 16-Kbyte or more versions to be improved.

Compared with the Mk I mode, selecting the Mk II mode increases the stack bytes by one during

execution of the subroutine call instruction. When a CALL !addr or CALLF !faddr instruction is

used, the instruction execution time increases by one machine cycle. Therefore, if RAM efficiency

or throughput is more important than software compatibility, use the Mk I mode.

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