UPD75P4308GS datasheet(6/60 Pages) NEC

6 / 60 page

µPD75P4308

PIN FUNCTIONS

3.1 Port Pins (1/2)

Pin name

I/O

Alternate

Function

8-bit

After

I/O Circuit

function

I/O

reset

typeNote 1

P00

Input

INT4

Input

<B>

P01

I/O

SCK

<F>-A

P02

I/O

SO/SB0

<F>-B

P03

Input

<B>-C

P10

Input

INT0

Input

<B>-C

P11

INT1

P12

INT2

P13

TI0/TI1

P20

I/O

PTO0

Input

E-B

P21

PTO1

P22

PCL

P23

—

P30

I/O

MD0

Input

E-B

P31

MD1

P32

MD2

P33

MD3

P50Note 2

I/O

High-

M-E

P51Note 2

impedance

P52Note 2

P53Note 2

Notes 1. Circuit types in brackets indicate Schmitt trigger input.

2. Low-level input leakage current increases when input instructions or bit manipulation instructions are

executed.

4-bit I/O port (PORT2).

Connections of on-chip pull-up resistors are

software-specifiable in 4-bit units.

4-bit input port (PORT1).

Connections of on-chip pull-up resistors are

software-specifiable in 4-bit units.

Noise elimination circuit can be selected

only for P10/INT0.

N-ch open-drain 4-bit input/output port

(PORT5).

13-V withstand during open-drain.

Data input/output pin for program memory

(PROM) write/verify (upper 4 bits).

Programmable 4-bit I/O port (PORT3).

Input and output can be specified in single-

bit units.

Connections of on-chip pull-up resistors are

software-specifiable in 4-bit units.

4-bit input port (PORT0).

For P01 to P03, connections of on-chip pull-

up resistors are software-specificable in 3-

bit units.

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