MIC2182 datasheet(20/28 Pages) MICREL

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MIC2182

Micrel

MIC2182

June 2000

pins and routed with a wide trace. The capacitor should be a

good quality tantalum. An additional 1

µF ceramic capacitor

may be necessary when driving large MOSFETs with high

gate capacitance. Incorrect placement of the V

DD decoupling

capacitor will cause jitter or oscillations in the switching

waveform and large variations in the overcurrent limit.

A 0.1

µF ceramic capacitor is required to decouple the VIN.

The capacitor should be placed near the IC and connected

directly to between pin 10 (Vcc) and pin 12 (PGND).

PCB Layout and Checklist

PCB layout is critical to achieve reliable, stable and efficient

performance. A ground plane is required to control EMI and

minimize the inductance in power, signal and return paths.

The following guidelines should be followed to insure proper

operation of the circuit.

• Signal and power grounds should be kept

separate and connected at only one location.

Large currents or high di/dt signals that occur

when the MOSFETs turn on and off must be

kept away from the small signal connections.

• The connection between the current-sense

resistor and the MIC2182 current-sense inputs

(pin 8 and 9) should have separate traces,

routed from the terminals directly to the IC pins.

The traces should be routed as closely as

possible to each other and their length should be

minimized. Avoid running the traces under the

inductor and other switching components. A 1nF

to 0.1

µF capacitor placed between pins 8 and 9

will help attenuate switching noise on the current

sense traces. This capacitor should be placed

close to pins 8 and 9.

• When the high-side MOSFET is switched on, the

critical flow of current is from the input capacitor

through the MOSFET, inductor, sense resistor,

output capacitor, and back to the input capacitor.

These paths must be made with short, wide

pieces of trace. It is good practice to locate the

ground terminals of the input and output capaci-

tors close to each.

• When the low-side MOSFET is switched on,

current flows through the inductor, sense

resistor, output capacitor, and MOSFET. The

source of the low-side MOSFET should be

located close to the output capacitor.

• The freewheeling diode, D1 in Figure 2, con-

ducts current during the dead time, when both

MOSFETs are off. The anode of the diode

should be located close to the output capacitor

ground terminal and the cathode should be

located close to the input side of the inductor.

• The 4.7

µF capacitor, which connects to the VDD

terminal (pin 11) must be located right at the IC.

The VDD terminal is very noise sensitive and

placement of this capacitor is very critical.

Connections must be made with wide trace. The

capacitor may be located on the bottom layer of

the board and connected to the IC with multiple

vias.

• The V

IN bypass capacitor should be located

close to the IC and connected between pins 10

and 12. Connections should be made with a

ground and power plane or with short, wide

trace.

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