TC1775 datasheet(22/101 Pages) INFINEON

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TC1775

Data Sheet

V1.2, 2002-05

Preliminary

HDRST4)

W20

I/O

Hardware Reset Input/Reset Indication Output

Assertion of this bidirectional open-drain pin causes a

synchronous reset of the chip through external circuitry. This

pin must be driven for a minimum duration.

The internal reset circuitry drives this pin in response to a

power-on, hardware, watchdog and power-down wake-up

reset for a specific period of time. For a software reset,

activation of this pin is programmable.

PORST5)

Y21

Power-on Reset Input

A low level on PORST causes an asynchronous reset of the

entire chip. PORST is a fully asynchronous level sensitive

signal.

CLKIN

EBU Clock Input

CLKIN must be connected externally with CLKOUT. For fine-

tuning of the external bus interface timing, this external

connection can be an external delay circuit.

CLKOUT

Clock Output

TEST

MODE4)

AB23

Test Mode Select Input

For normal operation of the TC1775, this pin should be

connected to

DDP05.

XTAL1

XTAL2

AC23

AC22

Oscillator/PLL/Clock Generator Input/Output Pins

XTAL1 is the input to the main oscillator amplifier and input

to the internal clock generator. XTAL2 is the output of the

main oscillator amplifier circuit. For clocking the device from

an external source, XTAL1 is driven with the clock signal

while XTAL2 is left unconnected. For crystal oscillator

operation XTAL1 and XTAL2 are connected to the crystal

with the appropriate recommended oscillator circuitry.

XTAL3

XTAL4

AB21

AA20

Real Time Clock Oscillator Input/Output

XTAL3 and XTAL4 are the input and the output of the 32 kHz

oscillator that is used for the Real Time Clock.

Table 1

Pin Definitions and Functions (cont’d)

Symbol

Out

Functions

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