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CLC418 Scheda tecnica(PDF) 2 Page - National Semiconductor (TI) |
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CLC418 Scheda tecnica(HTML) 2 Page - National Semiconductor (TI) |
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2 / 12 page ![]() http://www.national.com 2 PARAMETERS CONDITIONS TYP MIN/MAX RATINGS UNITS NOTES Ambient Temperature CLC418AJ +25˚C +25˚C 0 to 70˚C -40 to 85˚C FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo < 1.0Vpp 130 80 80 75 MHz B Vo < 4.0Vpp 45 33 29 28 MHz -0.1dB bandwidth Vo < 1.0Vpp 30 25 20 20 MHz gain flatness Vo < 1.0Vpp peaking DC to 200MHz 0 0.5 0.9 1.0 dB B rolloff <30MHz 0.2 0.45 0.6 0.6 dB B linear phase deviation <30MHz 0.2 0.4 0.5 0.5 deg differential gain NTSC, RL=150Ω 0.1 – – – % differential phase NTSC, RL=150Ω 0.4 – – – deg TIME DOMAIN RESPONSE rise and fall time 2V step 4.6 7.0 7.5 8.0 ns settling time to 0.2% 2V step 15 30 38 40 ns overshoot 2V step 5 12 12 12 % slew rate AV = +2 2V step 350 260 225 215 V/ µs DISTORTION AND NOISE RESPONSE 2nd harmonic distortion 2Vpp, 1MHz -85 – – – dBc 2Vpp, 1MHz; RL = 1kΩ -85 – – – dBc 2Vpp, 5MHz -65 -60 -58 -58 dBc B 3rd harmonic distortion 2Vpp, 1MHz -64 – – – dBc 2Vpp, 1MHz; RL = 1kΩ -75 – – – dBc 2Vpp, 5MHz -50 -45 -44 -44 dBc B crosstalk (input-referred) 2Vpp, 5MHz -74 -68 -68 -68 dBc equivalent input noise voltage (eni) >1MHz 5 6.3 6.6 6.7 nV/ √Hz non-inverting current (ibn) >1MHz 1.4 1.8 1.9 2.3 pA/ √Hz inverting current (ibi) >1MHz 13 16 17 18 pA/ √Hz STATIC DC PERFORMANCE input offset voltage 2 8 11 11 mV A average drift 25 – 35 40 µV/˚C input bias current (non-inverting) 2 8 11 15 µA A average drift 60 – 80 110 nA/˚C input bias current (inverting) 2 10 18 20 µA A average drift 20 – 90 110 nA/˚C power supply rejection ratio DC 55 50 48 48 dB B common-mode rejection ratio DC 52 48 46 46 dB supply current RL= ∞, 2 channels 3.0 3.4 3.6 3.6 mA A MISCELLANEOUS PERFORMANCE input resistance (non-inverting) 5 3 2.5 1 M Ω input capacitance (non-inverting) 1 2 2 2 pF common mode input range ±2.7 ±2.3 ±2.2 ±2.0 V output voltage range RL = 100Ω ±3.3 ±2.9 ±2.8 ±2.6 V output voltage range RL = ∞ ±4.0 ±3.8 ±3.7 ±3.5 V output current 96 96 96 60 mA C output resistance, closed loop DC 0.03 0.15 0.2 0.3 Ω CLC418 Electrical Characteristics (A V = +2, Rf = 1kΩ, Vcc = + 5V, RL = 100Ω, T = 25°C; unless specified) Absolute Maximum Ratings supply voltage ±7V output current (see note C) 96mA common-mode input voltage ±VCC maximum junction temperature +175°C storage temperature range -65°C to +150°C lead temperature (soldering 10 sec) +300°C ESD rating (human body model) 4000V Notes A) J-level: spec is 100% tested at +25°C, sample tested at +85°C. L-level: spec is 100% wafer probed at +25°C. B) J-level: spec is sample tested at +25°C. C) The output current sourced or sunk by the CLC418 can exceed the maximum safe output current limit. 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. |
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